RMLV1616A Series
R10DS0258EJ0100 Rev.1.00 Page 13 of 14
2016.01.06
Low V
CC
Data Retention Characteristics
Parameter Symbol Min. Typ. Max. Unit Test conditions
*37,38
V
CC
for data retention V
DR
1.5 ─ 3.6 V
Vin ≥ 0V
(1) CS2 ≤ 0.2V or
(2) CS1# ≥ V
CC
-0.2V,
CS2 ≥ V
CC
-0.2V or
(3) LB# = UB# ≥ V
CC
-0.2V,
CS1# ≤ 0.2V, CS2 ≥ V
CC
-0.2V
Data retention current I
CCDR
─ 0.5
*39
3 A ~+25°C
V
CC
= 3.0V, Vin ≥ 0V
(1) CS2 ≤ 0.2V or
(2) CS1# ≥ V
CC
-0.2V,
CS2 ≥ V
CC
-0.2V or
(3) LB# = UB# ≥ V
CC
-0.2V,
CS1# ≤ 0.2V,
CS2 ≥ V
CC
-0.2V
─ 0.8
*40
5 A ~+40°C
─ 2.5
*41
12 A ~+70°C
─ 5
*42
16 A ~+85°C
Chip deselect time to data retention t
CDR
0 ─ ─ ns
See retention waveform.
Operation recovery time t
R
5 ─ ─ ms
Note 37. BYTE# pin supported by only 48pin TSOP (I) and 52pin µTSOP (II) types.
BYTE# ≥ Vcc - 0.2V or BYTE# ≤ 0.2V
38. CS2 controls address buffer, WE# buffer, CS1# buffer, OE# buffer, LB# buffer, UB# buffer and DQ buffer.
If CS2 controls data retention mode, Vin levels (address, WE#, CS1#, OE#, LB#, UB#, DQ) can be in the high
impedance state. If CS1# controls data retention mode, CS2 must be CS2 ≥ V
CC
-0.2V or CS2 ≤ 0.2V.
The other inputs levels (address, WE#, OE#, LB#, UB#, DQ) can be in the high-impedance state.
39. Typical parameter indicates the value for the center of distribution at 3.0V (Ta=25ºC), and not 100% tested.
40. Typical parameter indicates the value for the center of distribution at 3.0V (Ta=40ºC), and not 100% tested.
41. Typical parameter indicates the value for the center of distribution at 3.0V (Ta=70ºC), and not 100% tested.
42. Typical parameter indicates the value for the center of distribution at 3.0V (Ta=85ºC), and not 100% tested.
