Philips Semiconductors Product specification
PowerMOS transistor BUK202-50Y
TOPFET high side switch
Fig.28. Typical negative load clamping voltage.
V
LG
= f(T
j
); parameter I
L
; condition V
IG
= 0 V.
Fig.29. Typical battery to load clamping voltage.
V
BL
= f(T
j
); parameter I
L
; condition I
G
= 5 mA.
Fig.30. Typical reverse battery characteristic.
I
G
= f(V
BG
); conditions I
L
= 0 A, T
j
= 25 ˚C
Fig.31. Typical reverse diode characteristic.
I
L
= f(V
BL
); conditions V
IG
= 0 V, T
j
= 25 ˚C
Fig.32. Typical output capacitance. T
mb
= 25 ˚C
C
bl
= f(V
BL
); conditions f = 1 MHz, V
IG
= 0 V
Fig.33. Typical overload characteristic, T
mb
= 25 ˚C.
I
L
= f(V
BL
); condition V
BG
= 13 V; parameter t
p
-60 -20 20 60 100 140 180
Tj / C
VLG / V BUK202-50Y
-22
-20
-18
-16
-14
-12
-10
10 A
1 mA
IL =
tp = 300 us
-1.1 -0.9 -0.7 -0.5 -0.3 -0.1
VBL / V
IL / A BUK202-50Y
-10
-20
-30
-40
-50
0
-60 -20 20 60 100 140 180
Tj / C
VBL / V BUK202-50Y
65
60
55
50
100 uA
1 mA
4 A
IL =
tp = 300 us
0 20 40
VBL / V
Cbl BUK202-50Y
10 nF
1 nF
100 pF
10 30 50
-20 -10 0
VBG / V
IG / mA BUK202-50Y
0
-50
-100
-150
-15 -5
0 4 8 12 16 20 24
VBL / V
IL / A BUK202-50Y
70
60
50
40
30
20
10
0
current limiting
i.e. before short
circuit load trip
50 us
tp =
300 us
VBL(TO) typ.
April 1995 10 Rev 1.100
