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LTC1293CCSW#PBF

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1
LTC1293/LTC1294/LTC1296
129346fs
Single Chip 12-Bit
Data Acquisition System
The LTC1293/4/6 is a family of data acquisition systems
which contain a serial I/O successive approximation A/D
converter. It uses LTCMOS
TM
switched capacitor technol-
ogy to perform either 12-bit unipolar, or 11-bit plus sign
bipolar A/D conversions. The input multiplexer can be
configured for either single ended or differential inputs (or
combinations thereof). An on-chip sample and hold is
included for all single ended input channels. When the
LTC1293/4/6 is idle it can be powered down in applica-
tions where low power consumption is desired. The
LTC1296 includes a System Shutdown Output pin which
can be used to power down external circuitry, such as
signal conditioning circuitry prior to the input mux.
The serial I/O is designed to communicate without external
hardware to most MPU serial ports and all MPU parallel
I/O ports allowing up to eight channels of data to be
transmitted over as few as three wires.
D
U
ESCRIPTIO
S
F
EA
T
U
RE
■
Software Programmable Features
Unipolar/Bipolar Conversion
Differential/Single Ended Inputs
MSB-First or MSB/LSB Data Sequence
Power Shutdown
■
Built-In Sample and Hold
■
Single Supply 5V or ±5V Operation
■
Direct 4-Wire Interface to Most MPU Serial
Ports and All MPU Parallel Ports
■
46.5kHz Maximum Throughput Rate
■
System Shutdown Output (LTC1296)
U
A
O
PP
L
IC
AT
ITY
P
I
CA
L
12-Bit Data Acquisition System with Power Shutdown
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
DGND
–
+
R
B
5.1k
R2
1.2M
R1
10k
1/4 LT1014
R2
1.2M
C2
1µF
350Ω STRAIN
GAUGE BRIDGE
+5V
47µF
1N4148
MPU
LTC1296
V
CC
SSO
CLK
CS
D
OUT
D
IN
REF
+
REF
–
AGND
V
–
THREE ADDITIONAL STRAIN GAUGE INPUTS
CAN BE ACCOMMODATED USING THE OTHER
AMPLIFIERS IN THE LT1014
LTC1293 TA01
2N3906
74HC04
■
Resolution: 12 Bits
■
Fast Conversion Time: 12µs Max Over Temp
■
Low Supply Current: 6.0mA
LTCMOS
TM
is a trademark of Linear Technology Corporation
KEY SPECIFICATIO S
U
2
LTC1293/LTC1294/LTC1296
129346fs
T
JMAX
= 110°C, θ
JA
= 150°C/ W
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
DGND
DV
CC
AV
CC
CLK
CS
D
OUT
D
IN
REF
+
REF
–
AGND
V
–
ORDER PART
NUMBER
A
U
G
W
A
W
U
W
ARB
S
O
LU
T
EXI T
I
S
Supply Voltage (V
CC
) to GND or V
–
......................... 12V
Negative Supply Voltage (V
–
) ..................... –6V to GND
Voltage
Analog and Reference
Inputs ............................ (V
–
) –0.3V to V
CC
+ 0.3V
Digital Inputs ......................................... –0.3V to 12V
Digital Outputs .......................... –0.3V to V
CC
+ 0.3V
Power Dissipation............................................. 500mW
Operating Temperature Range
LTC1293/4/6BC, LTC1293/4/6CC,
LTC1293/4/6DC ....................................... 0°C to 70°C
LTC1296BI, LTC1296CI, LTC1296DI ... –40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................ 300°C
(Notes 1 and 2)
WU
U
PACKAGE
/
O
RDER I FOR ATIO
ORDER PART
NUMBER
LTC1293BCN
LTC1293CCN
LTC1293DCN
LTC1293BCSW
LTC1293CCSW
LTC1293DCSW
LTC1294BCSW
LTC1294CCSW
LTC1294DCSW
LTC1294BCN
LTC1294CCN
LTC1294DCN
T
JMAX
= 110°C, θ
JA
= 100°C/ W (N)
SW PACKAGE, 16-LEAD PLASTIC SO WIDE
T
JMAX
= 110°C, θ
JA
= 150°C/ W
LTC1296BCSW
LTC1296CCSW
LTC1296DCSW
LTC1296BISW
LTC1296CISW
LTC1296DISW
LTC1296BIN
LTC1296CIN
LTC1296DIN
LTC1296BCN
LTC1296CCN
LTC1296DCN
T
JMAX
= 110°C, θ
JA
= 100°C/ W (N)
Consult factory for Industrial and Military grades.
T
JMAX
= 110°C, θ
JA
= 100°C/ W (N)
LTC1294BCJ
LTC1294CCJ
LTC1294DCJ
LTC1296BCJ
LTC1296CCJ
LTC1296DCJ
T
JMAX
= 150°C, θ
JA
= 80°C/ W (J)
J PACKAGE, 20-LEAD CERDIP
OBSOLETE PACKAGE
Consider the N Package for Alternate Source
T
JMAX
= 150°C, θ
JA
= 80°C/ W (J)
J PACKAGE, 20-LEAD CERDIP
OBSOLETE PACKAGE
Consider the N Package for Alternate Source
T
JMAX
= 110°C, θ
JA
= 150°C/ W
SW PACKAGE, 20-LEAD PLASTIC SO WIDE
SW PACKAGE, 20-LEAD PLASTIC SO WIDE
N PACKAGE, 16-LEAD PDIP
N PACKAGE, 20-LEAD PDIP
N PACKAGE, 20-LEAD PDIP
(Top Views)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CH0
CH1
CH2
CH3
CH4
CH5
COM
DGND
V
CC
CLK
CS
D
OUT
D
IN
V
REF
AGND
V
–
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CH0
CH1
CH2
CH3
CH4
CH5
COM
DGND
V
CC
CLK
CS
D
OUT
D
IN
V
REF
AGND
V
–
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
DGND
DV
CC
AV
CC
CLK
CS
D
OUT
D
IN
REF
+
REF
–
AGND
V
–
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
DGND
V
CC
SSO
CLK
CS
D
OUT
D
IN
REF
+
REF
–
AGND
V
–
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
DGND
V
CC
SSO
CLK
CS
D
OUT
D
IN
REF
+
REF
–
AGND
V
–
3
LTC1293/LTC1294/LTC1296
129346fs
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
Offset Error (Note 4) ● ±3.0 ±3.0 ±3.0 LSB
Linearity Error (INL) (Notes 4, 5) ● ±0.5 ±0.5 ±0.75 LSB
Gain Error (Note 4) ● ±0.5 ±1.0 ±4.0 LSB
Minimum Resolution for which No
● 12 12 12 Bits
Missing Codes are Guaranteed
Analog and REF Input Range (Note 7) (V
–
)–0.05V to V
CC
+ 0.05V V
On Channel Leakage Current (Note 8) On Channel = 5V
● ±1 ±1 ±1 µA
Off Channel = 0V
On Channel = 0V ● ±1 ±1 ±1 µA
Off Channel = 5V
Off Channel Lekage Current (Note 8) On Channel = 5V ● ±1 ±1 ±1 µA
Off Channel = 0V
On Channel = 0V ● ±1 ±1 ±1 µA
Off Channel = 5V
(Note 3)
LTC1293/4/6C
LTC1293/4/6D
LTC1293/4/6B
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
CLK
Clock Frequency V
CC
= 5V (Note 6) 0.1 1.0 MHz
t
SMPL
Analog Input Sample Time See Operating Sequence 2.5 CLK Cycles
t
CONV
Conversion Time See Operating Sequence 12 CLK Cycles
t
CYC
Total Cycle Time See Operating Sequence (Note 6) 21 CLK Cycles
+500ns
t
dDO
Delay Time, CLK↓ to D
OUT
Data Valid See Test Circuits ● 160 300 ns
t
dis
Delay Time, CS↑ to D
OUT
Hi-Z See Test Circuits ● 80 150 ns
t
en
Delay Time, CLK↓ to D
OUT
Enabled See Test Circuits ● 80 200 ns
t
hDI
Hold Time, D
IN
after CLK↑ V
CC
= 5V (Note 6) 50 ns
t
hDO
Time Output Data Remains Valid After CLK↓ 130 ns
t
f
D
OUT
Fall Time See Test Circuits ● 65 130 ns
t
r
D
OUT
Rise Time See Test Circuits ● 25 50 ns
t
WHCLK
CLK High Time V
CC
= 5V (Note 6) 300 ns
t
WLCLK
CLK Low Time V
CC
= 5V (Note 6) 400 ns
t
suDI
Set-up Time, D
IN
Stable Before CLK↑ V
CC
= 5V (Note 6) 50 ns
t
suCS
Set-up Time, CS↓ before CLK↑ V
CC
= 5V (Note 6) 50 ns
t
wHCS
CS High Time During Conversion V
CC
= 5V (Note 6) 500 ns
t
wLCS
CS Low Time During Data Transfer V
CC
= 5V (Note 6) 21 CLK Cycles
t
enSSO
Delay Time, CLK↓ to SSO↓ See Test Circuits ● 750 1500 ns
t
disSSO
Delay Time, CS↓ to SSO↑ See Test Circuits ● 250 500 ns
C
IN
Input Capacitance Analog Inputs On Channel 100 pF
Analog Inputs Off Channel 5
Digital Inputs 5
LTC1293/4/6B
LTC1293/4/6C
LTC1293/4/6D
AC CHARACTERISTICS (Note 3)
CO VERTER A D ULTIPLEXER CHARACTERISTICS
U
W
U
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LTC1293CCSW#PBF

Mfr. #:
Buy LTC1293CCSW#PBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-Bit Serial I/O ADC w/6 CH MUX
Lifecycle:
New from this manufacturer.
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