2©2015 Integrated Device Technology, Inc Revision E December 2, 2015
85304-01 Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Number Name Type Description
1, 2
Q0, nQ0
Output Differential output pair. LVPECL interface levels.
3, 4
Q1, nQ1
Output Differential output pair. LVPECL interface levels.
5, 6
Q2, nQ2
Output Differential output pair. LVPECL interface levels.
7, 8
Q3, nQ3
Output Differential output pair. LVPECL interface levels.
9, 10
Q4, nQ4
Output Differential output pair. LVPECL interface levels.
11, 18, 20 V
CC
Power Power supply pins.
12 CLK_SEL Input Pulldown
Clock select input. When HIGH, selects CLK1, nCLK1 inputs. When LOW,
selects CLK0, nCLK0 inputs. LVTTL/LVCMOS interface levels.
13 CLK0 Input Pulldown Non-inverting differential clock input.
14 nCLK0 Input Pullup Inverting differential clock input.
15 V
EE
Power Negative supply pin.
16 CLK1 Input Pulldown Non-inverting differential clock input.
17 nCLK1 Input Pullup Inverting differential clock input.
19 CLK_EN Input Pullup
Synchronizing clock enable. When HIGH, clock outputs follow clock input.
When LOW, Qx outputs are forced LOW, nQx outputs are forced HIGH.
LVTTL/LVCMOS interface levels.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4 pF
R
PULLDOWN
Input Pulldown Resistor 51 k
R
PULLUP
Input Pullup Resistor 51 k
