10©2015 Integrated Device Technology, Inc Revision E December 2, 2015
85304-01 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the 85304-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 85304-01 is the sum of the core power plus the output power dissipated due to loading.
The following is the power dissipation for V
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating output power dissipated due to loading.
• Power (core)
MAX
= V
CC_MAX
* I
EE_MAX
= 3.465V * 55mA = 190.57mW
• Power (outputs)
MAX
= 30.2mW/Loaded Output pair
If all outputs are loaded, the total power is 5 * 30.2mW = 151mW
Total Power_
MAX
(3.465V, with all outputs switching) = 190.57mW + 151mW = 341.57mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 73.2°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.342W * 73.2°C/W = 95°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
JA
for 20 Lead TSSOP, Forced Convection
JA
by Velocity
Linear Feet per Minute 0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
