
Low Skew, 1-to-2 LVCMOS / LVTTL
Fanout Buffer W/ Complementary Output
8302I-01
Data Sheet
©2016 Integrated Device Technology, Inc Revision A March 7, 20161
GENERAL DESCRIPTION
The 8302I-01 is a low skew, 1-to-2 LVCMOS/LVTTL Fanout
Buffer w/Complementary Output. The 8302I-01 has a single
ended clock input. The single ended clock input accepts
LVCMOS or LVTTL input levels. The 8302I-01 is characterized
at full 3.3V for input V
DD
, and mixed 3.3V and 2.5V for output
operating supply modes (V
DDO
). Guaranteed output and part-
to-part skew characteristics make the 8302I-01 ideal for clock
distribution applications demanding well defi ned performance
and repeatability.
FEATURES
• Complementary LVCMOS / LVTTL output
• LVCMOS / LVTTL clock input accepts LVCMOS
or LVTTL input levels
• Maximum output frequency: 250MHz
• Output skew: 165ps (maximum)
• Part-to-part skew: 800ps (maximum)
• Small 8 lead SOIC package saves board space
• Full 3.3V or 3.3V core/2.5V output supply modes
• -40°C to 85°C ambient operating temperature
• Available in lead-free compliant package
BLOCK DIAGRAM PIN ASSIGNMENT
8302I-01
8-Lead SOIC
3.8mm x 4.8mm, x 1.47mm package body
M Package
Top View
VDDO
VDD
CLK
GND
1
2
3
4
Q
nQ
CLK
Q
GND
V
DDO
nQ
8
7
6
5