8302AMI-01LF

Low Skew, 1-to-2 LVCMOS / LVTTL
Fanout Buffer W/ Complementary Output
8302I-01
Data Sheet
©2016 Integrated Device Technology, Inc Revision A March 7, 20161
GENERAL DESCRIPTION
The 8302I-01 is a low skew, 1-to-2 LVCMOS/LVTTL Fanout
Buffer w/Complementary Output. The 8302I-01 has a single
ended clock input. The single ended clock input accepts
LVCMOS or LVTTL input levels. The 8302I-01 is characterized
at full 3.3V for input V
DD
, and mixed 3.3V and 2.5V for output
operating supply modes (V
DDO
). Guaranteed output and part-
to-part skew characteristics make the 8302I-01 ideal for clock
distribution applications demanding well defi ned performance
and repeatability.
FEATURES
Complementary LVCMOS / LVTTL output
LVCMOS / LVTTL clock input accepts LVCMOS
or LVTTL input levels
Maximum output frequency: 250MHz
Output skew: 165ps (maximum)
Part-to-part skew: 800ps (maximum)
Small 8 lead SOIC package saves board space
Full 3.3V or 3.3V core/2.5V output supply modes
-40°C to 85°C ambient operating temperature
Available in lead-free compliant package
BLOCK DIAGRAM PIN ASSIGNMENT
8302I-01
8-Lead SOIC
3.8mm x 4.8mm, x 1.47mm package body
M Package
Top View
VDDO
VDD
CLK
GND
1
2
3
4
Q
nQ
CLK
Q
GND
V
DDO
nQ
8
7
6
5
8302I-01 Data Sheet
©2016 Integrated Device Technology, Inc Revision A March 7, 20162
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
Number Name Type Description
1, 6 V
DDO
Power Output supply pins.
2V
DD
Power Power supply pin.
3 CLK Input Pulldown LVCMOS / LVTTL clock input.
4,7 GND Power Power supply ground.
5 nQ Output Complementary clock output. LVCMOS / LVTTL interface levels.
8 Q Output Clock output. LVCMOS / LVTTL interface levels.
NOTE: Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4 pF
C
PD
Power Dissipation Capacitance
(per output)
V
DD
, V
DDO
= 3.465V 22 pF
V
DD
= 3.465V, V
DDO
= 2.625V 16 pF
R
PULLDOWN
Input Pulldown Resistor 51
kΩ
R
OUT
Output Impedance 5 7 12
Ω
8302I-01 Data Sheet
©2016 Integrated Device Technology, Inc Revision A March 7, 20163
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, V
DD
= 3.3V±5%, V
DDO
= 3.3V±5% OR 2.5V±5%, TA = -40°C TO 85°C
TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, V
DD
= 3.3V±5%, V
DDO
= 3.3V±5% OR 2.5V±5%, TA = -40°C TO 85°C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5 V
Outputs, V
O
-0.5V to V
DDO
+ 0.5V
Package Thermal Impedance, θ
JA
112.7°C/W (0 lfpm)
Storage Temperature, T
STG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifi cations only. Functional
operation of product at these conditions or any conditions
beyond those listed in the DC Characteristics or AC Charac-
teristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2 V
DD
+ 0.3 V
V
IL
Input Low Voltage -0.3 0.8 V
I
IH
Input High Current CLK V
DD
= V
IN
= 3.465V 150 µA
I
IL
Input Low Current CLK V
DD
= 3.465V, V
IN
= 0V -5 µA
V
OH
Output High Voltage
V
DDO
= 3.465, 50Ω to V
DDO
/2 2.6 V
V
DDO
= 3.465, I
OH
= -100µA 2.9 V
V
DDO
= 2.625, 50Ω to V
DDO
/2
1.8 V
V
DDO
= 2.625, I
OH
= -100µA 2.2 V
V
OL
Output Low Voltage
V
DDO
= 3.465, 50Ω to V
DDO
/2
0.5 V
V
DDO
= 3.465, I
OL
= 100µA 0.2 V
V
DDO
= 2.625, 50Ω to V
DDO
/2
0.5 V
V
DDO
= 2.625, I
OL
= 100µA 0.2 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 3.135 3.3 3.465 V
V
DDO
Output Power Supply Voltage
3.135 3.3 3.465 V
2.375 2.5 2.625 V
I
DD
Power Supply Current 13 mA
I
DDO
Output Supply Current 4mA

8302AMI-01LF

Mfr. #:
Manufacturer:
Description:
Clock Buffer 2 LVCMOS OUT BUFFER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet