Figure 5. MM912_P812 Pin Connections
EP
GND
N.C.
TEST3
TEST2
TEST1
WD_INH
INJOUT
PGND1
DGND
LAMPOUT
PGND2
ROUT
TM_EN
WDRFSH
MRX
N.C.
MTX
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
IGNOUTL
IGNOUTH
IGNSUP
ISO9141
VCCSENS
VCCREF
VPWR
PM4
PM2
PM3
PM1
PM0
VSSX1
VDDX1
PP3
PT0
PT1
PT2
PT3
PJ0 *
PJ1 *
PT4
PT5
PT6
IGNFB
PT7
BKGD
PB2
PB3
PB4
PB5
PE7
PE4
VSSX2
VDDX2
RESET
VDDR
VSS3
VSSPLL
EXTAL
XTAL
PE2 *
PE0/XIRQ
PE1/IRQ
PA1
PA5
PB6
PA6 *
PE6
PB0
RESET
INJFLT
RELFLT
IGNFLT
RIN
LAMPIN
IGNIN
INJIN
* PAD09
PAD00
PAD01
PAD02
PAD03
PAD04
PAD05
PAD06
PAD07
VDDA
VRH
VRL
VSSA
PS0/
RXD
PS1/
TXD
TEST
PM5/SCK
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
Transparent Top View
Notes
5. Pins denoted by an * are functionally different in calibration on the S12XEP100 device. If using both devices with the same PC board,
be aware of the differences.
6. EP, PGND1, PGND2, and DGND, must all be connected to the ground plane.
7. Compared to the S12P in the 80 pin QFP package, 21 pins are missing in the SiP. These pins are: PP2, PP1, PP0, PB1, PB7, PE5,
PJ2, PE3, PA0, PA2, PA3, PA4, PA7, PAD08, PS2, PS3, PJ7, PJ6, PP7, PP5, and PP4.
/MOSI
/SS
/MISO