Analog Integrated Circuit Device Data
Freescale Semiconductor 9
MM912_P812
PIN CONNECTIONS
MCU 45 PT3 I/O PT3/IOC3
Port T, I/O pin 3 is a general purpose input or output pin. It can be
configured as a timer (TIM) channel 3.
MCU 46 PJ0
VDDF
(8)
I/O
Supply
(8)
PJ0/KWJ0
VDDF 3.3 V supply
output
(8)
(S12XEP100 ONLY)
Port J, I/O pin 0 is a general purpose input or output pin. It can be
configured as a keypad wake-up input. (Only on S12P, not on
S12XEP100)
Signals VDDF/VSS are the secondary outputs of VREG_3V3 that
provide the power supply for the NVM logic. These signals are connected
to device pins to allow external decoupling capacitors (220 nF, X7R
ceramic). In Shutdown mode an external supply driving VDDF/VSS can
replace the voltage regulator. On S12XEP100.
(8)
MCU 47 PJ1
VSS1
(8)
I/O
Ground
(8)
PJ1/KWJ1
VSS1
(8)
Port J, I/O pin 1 is a general purpose input or output pin. It can be
configured as a keypad wake-up input (Only on S12P, not on
S12XEP100)
See previous description for VDDF/VSS. Only on S12XEP100
(8)
MCU 48 PT4 I/O PT4/IOC4/PWM4
Port T, I/O pin 4 is a general purpose input or output pin. It can be
configured as a timer (TIM) channel 4 or pulse width modulator (PWM)
output 4.
MCU 49 PT5 I/O PT5/IOC5/PWM5/
API_EXTCLK
Port T, I/O pin 5 is a general purpose input or output pin. It can be
configured as a timer (TIM) channel 5, pulse width modulator (PWM)
output 5, or as the output of the API_EXTCLK.
MCU 50 PT6 I/O PT6/IOC6
Port T, I/O pin 6 is a general purpose input or output pin. It can be
configured as a timer (TIM) channel 6.
MCU 51 PT7 I/O PT7/IOC7
Port T, I/O pin 7 is a general purpose input or output pin. It can be
configured as a timer (TIM) channel 7.
MCU 52 BKGD BDM BKGD/MODC
The BKGD/MODC pin is used as a pseudo open-drain pin for the
background debug communication. It is used as a MCU operating mode
select pin during reset. The state of this pin is latched to the MODC bit at
the rising edge of RESET
. The BKGD pin has an internal pull-up device.
MCU 53 PB0 I/O PB0
Port B, I/O pin 0 is a general purpose input or output pin.
MCU 54 PB2 I/O PB2
Port B, I/O pin 2 is a general purpose input or output pin.
MCU 55 PB3 I/O PB3
Port B, I/O pin 3 is a general purpose input or output pin.
MCU 56 PB4 I/O PB4
Port B, I/O pin 4 is a general purpose input or output pin.
MCU 57 PB5 I/O PB5
Port B, I/O pin 5 is a general purpose input or output pin.
MCU 58 PB6 I/O PB6
Port B, I/O pin 6 is a general purpose input or output pin.
MCU 59 PE7 I/O PE7/ECLKX2
Port E, I/O pin 7 is a general purpose input or output pin. An internal pull-
up is enabled during reset. It can be configured to output ECLKX2.
MCU 60 PE6 I/O PE6
Port E, I/O pin 6 is a general purpose input or output pin.
MCU 61 PE4 I/O PE4/ECLK
Port E, I/O pin 4 is a general purpose input or output pin. It can be
configured to drive the internal bus clock ECLK. ECLK can be used as a
timing reference. The ECLK output has a programmable prescaler.
MCU 62 VSSX2 Ground VSSX2
External ground for I/O drivers. Bypass requirements depend on how
heavily the MCU pins are loaded. All VSSX pins are connected together
internally. Connect to Ground
MCU 63 VDDX2 Supply
Input
VDDX2
External power for I/O drivers. Bypass requirements depend on how
heavily the MCU pins are loaded. All VDDX pins are connected together
internally. Connect to VCC and use a 100 nF bypass capacitor to Ground
Table 4. MM912_P812 Pin Definitions
Analog
or MCU
Pin Pin Name
Pin
Function
Formal Name Description and Recommendations
