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EPCQL256F24IN

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34
Bit Name Value Description
2 BP0
(12)
1 WEL (Write Enable
Latch Bit)
• 1=Allows the following operation to run:
— Write Bytes
— Write Status Register
— Erase Bulk
— Erase Die
— Erase Sector
• 0=Rejects the above mentioned operations.
Allows or rejects certain
operation to run.
0 WIP (Write in
Progress Bit)
• 1=One of the following operation is in progress:
— Write Status Register
— Write NVCR
— Write Bytes
— Erase
• 0=no write or erase cycle in progress
Indicates if there is a
command in progress.
Read Status Register Operation (05h)
The status register can be read continuously and at anytime, including during a write
or erase operations.
Figure 2. Read Status Register Operation Timing Diagram
nCS
DCLK
DATA0
DATA
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
7 6 5 4 3 2 1 0 7 2 1 0 76 5 4 3
Operation Code (05h)
MSB MSB
Status Register Out Status Register Out
High Impedance
Block Protection Bits in EPCQ-L256 when TB Bit is Set to 0
Table 15. Block Protection Bits in EPCQ-L256 when TB Bit is Set to 0
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
0 0 0 0 0 None All sectors
0 0 0 0 1 Sector 511 Sectors (0 to 510)
0 0 0 1 0 Sectors (510 to 511) Sectors (0 to 509)
0 0 0 1 1 Sectors (508 to 511) Sectors (0 to 507)
0 0 1 0 0 Sectors (504 to 511) Sectors (0 to 503)
0 0 1 0 1 Sectors (496 to 511) Sectors (0 to 495)
0 0 1 1 0 Sectors (480 to 511) Sectors (0 to 479)
0 0 1 1 1 Sectors (448 to 511) Sectors (0 to 447)
0 1 0 0 0 Sectors (384 to 511) Sectors (0 to 383)
0 1 0 0 1 Sectors (256 to 511) Sectors (0 to 255)
continued...
EPCQ-L Serial Configuration Devices Datasheet
CF52013 | 2018.05.18
EPCQ-L Serial Configuration Devices Datasheet
13
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
0 1 0 1 0 All sectors None
0 1 0 1 1 All sectors None
0 1 1 0 0 All sectors None
0 1 1 0 1 All sectors None
0 1 1 1 0 All sectors None
0 1 1 1 1 All sectors None
Block Protection Bits in EPCQ-L256 when TB Bit is Set to 1
Table 16. Block Protection Bits in EPCQ-L256 when TB Bit is Set to 1
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
1 0 0 0 0 None All sectors
1 0 0 0 1 Sector 0 Sectors (1 to 511)
1 0 0 1 0 Sectors (0 to 1) Sectors (2 to 511)
1 0 0 1 1 Sectors (0 to 3) Sectors (4 to 511)
1 0 1 0 0 Sectors (0 to 7) Sectors (8 to 511)
1 0 1 0 1 Sectors (0 to 15) Sectors (16 to 511)
1 0 1 1 0 Sectors (0 to 31) Sectors (32 to 511)
1 0 1 1 1 Sectors (0 to 63) Sectors (64 to 511)
1 1 0 0 0 Sectors (0 to 127) Sectors (128 to 511)
1 1 0 0 1 Sectors (0 to 255) Sectors (256 to 511)
1 1 0 1 0 All sectors None
1 1 0 1 1 All sectors None
1 1 1 0 0 All sectors None
1 1 1 0 1 All sectors None
1 1 1 1 0 All sectors None
1 1 1 1 1 All sectors None
Block Protection Bits in EPCQ-L512 when TB Bit is Set to 0
Table 17. Block Protection Bits in EPCQ-L512 when TB Bit is Set to 0
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
0 0 0 0 0 None All sectors
0 0 0 0 1 Sector 1023 Sectors (0 to 1022)
0 0 0 1 0 Sectors (1022 to 1023) Sectors (0 to 1021)
continued...
EPCQ-L Serial Configuration Devices Datasheet
CF52013 | 2018.05.18
EPCQ-L Serial Configuration Devices Datasheet
14
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
0 0 0 1 1 Sectors (1020 to 1023) Sectors (0 to 1019)
0 0 1 0 0 Sectors (1016 to 1023) Sectors (0 to 1015)
0 0 1 0 1 Sectors (1008 to 1023) Sectors (0 to 1007)
0 0 1 1 0 Sectors (992 to 1023) Sectors (0 to 991)
0 0 1 1 1 Sectors (960 to 1023) Sectors (0 to 959)
0 1 0 0 0 Sectors (896 to 1023) Sectors (0 to 895)
0 1 0 0 1 Sectors (768 to 1023) Sectors (0 to 767)
0 1 0 1 0 Sectors (512 to 1023) Sectors (0 to 511)
0 1 0 1 1 All sectors None
0 1 1 0 0 All sectors None
0 1 1 0 1 All sectors None
0 1 1 1 0 All sectors None
0 1 1 1 1 All sectors None
Block Protection Bits in EPCQ-L512 when TB Bit is Set to 1
Table 18. Block Protection Bits in EPCQ-L512 when TB Bit is Set to 1
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
1 0 0 0 0 None All sectors
1 0 0 0 1 Sector 0 Sectors (1 to 1023)
1 0 0 1 0 Sectors (0 to 1) Sectors (2 to 1023)
1 0 0 1 1 Sectors (0 to 3) Sectors (4 to 1023)
1 0 1 0 0 Sectors (0 to 7) Sectors (8 to 1023)
1 0 1 0 1 Sectors (0 to 15) Sectors (16 to 1023)
1 0 1 1 0 Sectors (0 to 31) Sectors (32 to 1023)
1 0 1 1 1 Sectors (0 to 63) Sectors (64 to 1023)
1 1 0 0 0 Sectors (0 to 127) Sectors (128 to 1023)
1 1 0 0 1 Sectors (0 to 255) Sectors (256 to 1023)
1 1 0 1 0 Sectors (0 to 511) Sectors (512 to 1023)
1 1 0 1 1 All sectors None
1 1 1 0 0 All sectors None
1 1 1 0 1 All sectors None
1 1 1 1 0 All sectors None
1 1 1 1 1 All sectors None
EPCQ-L Serial Configuration Devices Datasheet
CF52013 | 2018.05.18
EPCQ-L Serial Configuration Devices Datasheet
15
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34

EPCQL256F24IN

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Buy EPCQL256F24IN
Manufacturer:
Intel / Altera
Description:
FPGA - Configuration Memory
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