8735BI-01 Data Sheet
REVISION 1 04/02/15 7 LOW SKEW, 1-TO-5, DIFFERENTIAL-TO-3.3V LVPECL/ECL
FANOUT BUFFER
AC Electrical Characteristics
Table 6. AC Characteristics, V
CC
= V
CCO
= 3.3V ± 5%, V
EE
= 0V, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from the differential input crossing point to the differential output crosspoint.
NOTE 2: Defined as the time difference between the input reference clock and the averaged feedback input signal across all conditions, when
the PLL is locked and the input reference frequency is stable.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential
crosspoint.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 5: Characterized at VCO frequency of 622MHz.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 700 MHz
t
PD
Propagation Delay; NOTE 1 PLL_SEL = 0V, f
OUT
700MHz 2.8 4.9 ns
t(Ø) Static Phase Offset; NOTE 2, 4 PLL_SEL = 3.3V -100 200 ps
tsk(o) Output Skew; NOTE 3, 4 55 ps
tjit(cc) Cycle-to-Cycle Jitter: NOTE 4, 5 50 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 700 ps
odc Output Duty Cycle f
OUT
250MHz 47 53 %
t
LOCK
PLL Lock Time 1ms
