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IXD611S1
P1-P3
P4-P6
P7-P9
P10-P12
P13-P14
10
IXD61
1
IXYS reserves the right to change limits, test conditions, and dimensions.
Quies
c
ent
Supply
Curr
ent
vs.
Suppl
y Volt
age
V
IN
= "0"
0
0.2
0.4
0.6
0.8
1
1.2
0
5
10
15
20
25
30
35
40
Suppl
y V
olt
age (
V
)
Quiesc
ent C
urrent
(mA)
Low
s
ide
H
igh s
ide
Input Threshold Level vs. Temperature
V
SUPPLY
= 15V
0
0.5
1
1.5
2
2.5
3
3.5
4
-50
0
50
100
150
Temperature (C)
Threshold Lev
el (V)
Neg. going input
Pos. goin
g input
Quiescent Current
vs. Temperature
V
IN
= "0"
V
SUPPLY
= 15V B
oth Drivers Combined
0.48
0.49
0.5
0.51
0.52
0.53
0.54
0.55
0.56
0.57
-50
0
50
100
150
Tem
peratur
e (C)
Quiescent Current (mA)
LI
N / HI
N B
i
as C
urr
ent vs.
Te
mperat
ur
e
V
SUPPLY
= 15V
0
2
4
6
8
10
12
14
16
-50
0
50
100
150
Tem
perat
ure (
C)
Input Bias Current (uA)
V
IN
= 5V
V
IN
= 15V
Input Threshold Level vs. Supply Voltage
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
0
5
10
15
20
25
30
35
40
Supply Voltage (V)
Threshold Level (V)
Positve going
Negative going
LIN /
H
I
N Bias Curr
en
t
vs. Suppl
y Vol
tage
V
IN
= Supply
Vol
tage
0
5
10
15
20
25
30
0
5
10
15
20
25
30
35
40
Supply
Vol
tage (
V)
Input Bias Curren
t (uA)
Logi
c "1"
ei
ther
input pi
n
Logi
c "0
" 2uA
max
.
Fig. 17
Fig. 18
Fig.19
Fig. 20
Fig.21
Fig.22
11
IXD61
1
© 2007 IXYS CORPORATION All rights reserved
Low Level Output Voltage vs. Supply
Voltag
e
Io = 20mA
0
20
40
60
80
100
120
140
160
180
200
0
5
10
15
20
25
30
35
Sup
ply Voltag
e (V)
Low Level Outp
ut Voltage (mV)
Low Side
High Side
Output S
ink Current vs. S
upply V
oltage
-1.6
-1.4
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
0
5
10
15
20
25
30
35
40
Suppl
y Volt
age (V)
Output Sink Current (A)
Output Source C
urrent vs. Supply Voltage
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
0
5
10
15
20
25
30
35
40
Supply Voltage (V)
Output Source Current (A)
High Level
Ouput Vol
tag
e vs
. Suppl
y Vol
tage
I
o
= 20mA
0
50
100
150
200
250
300
0
5
10
15
20
25
30
35
Supply Volt
age (
V)
High Level Ouput Voltage (mV)
Low S
ide
High Side
Output Sour
ce Current
vs. Temper
ature
V
SUPPLY
= 15V
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
-50
0
50
100
150
Temperat
ure (C)
Source Current (A)
Output Si
nk Current
vs. Teme
prature
V
SUPPLY
= 15V
-0.9
-0.8
-0.7
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0
-50
0
50
100
150
Temperature
(C)
Sink Current (A)
Fig. 23
Fig. 24
Fig. 25
Fig. 28
Fig. 27
Fig. 26
12
IXD61
1
IXYS reserves the right to change limits, test conditions, and dimensions.
Supply Curr
ent vs
. Suppl
y Volt
age
C
LOA
D
= 100pF V
IN
= V
SUPPLY
50
%
Du
ty C
ycle
0.1
1
10
100
0
5
10
15
20
25
30
35
40
Supply Volt
age (
V)
Supply Current (mA)
High side
10KHz
Low side 10KHz
Low side 100KH
z
High si
de 100KHz
1MH
z
2MH
z
Supply Curr
ent vs
. Suppl
y Volt
age
C
LOA
D
= 1000pF V
IN
= V
SUPPLY
50
% D
uty
C
ycle
0.1
1
10
100
0
5
10
15
20
25
30
35
40
Supply Vol
tage (
V)
Supply Current (mA)
Low Side10KHz
100KHz
1MHz
2MH
z
High Side10KHz
Output Resi
st
ance vs.
Supply Vol
t
age
0
2
4
6
8
10
12
14
0
5
10
15
20
25
30
35
40
Supply Vol
t
age (V)
Output Resistance (Ohms)
High St
ate /
Low Side
Low State /
Low Side
Hi
gh St
ate / Hi
gh Sid
e
Low State /
Hig
h Side
Hi
g
h T
o Low
Si
d
e Leak
ag
e
Cur
r
en
t
v
s
.
H
i
gh Si
d
e
V
O
FFSET
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
0
100
200
300
400
500
600
700
Hi
gh Si
de Off
set
Vol
t
age (V)
Leak
age Cur
rent (
mA)
Pulse Width Stability vs. Temperature
V
CL
= V
CH
= 15V I
nput PW = 300ns
280
285
290
295
300
305
-50
0
50
100
150
Temperat
ure (C)
Pulse Width Out (ns)
Low Side
High Side
High to Low Side Leakage Current vs. Temperature
V
OFFSET
= 600V V
CL
= V
CH
= 15V
114
116
118
120
122
124
126
128
130
132
-50
0
50
100
150
Temperature (C)
Leakage Current (uA)
Fig. 29
Fig. 30
Fig. 31
Fig. 32
Fig. 33
Fig. 34
P1-P3
P4-P6
P7-P9
P10-P12
P13-P14
IXD611S1
Mfr. #:
Buy IXD611S1
Manufacturer:
Description:
IC DRVR HALF BRIDGE 600MA 8-SOIC
Lifecycle:
New from this manufacturer.
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