IXD611S1 Datasheet IXD611P1, IXD611P7, IXD611S1 | P4-P6

4

IXD611

IXYS reserves the right to change limits, test conditions, and dimensions.

Symbol Definition Min Max Units

V

HS

High side floating supply offset voltage -200 650 V

V

CH

High side floating absolute voltage -0.3 35 V

V

HGO

High side floating output voltage V

HS

- 0.3 V

CH

+ 0.3 V

V

CL

Low side fixed supply voltage -0.3 35 V

V

LGO

Low side output voltage -0.3 V

CL

+ 0.3 V

V

DG

Logic supply offset voltage (P7, S7 only) V

LS

- 0.7 V

LS

+ 0.7 V

V

IN

Logic input voltage(HIN & LIN) LS - 0.3 V

CL

+ 0.3 V

dV

HS

/dt Allowable offset supply voltage transient 50 V/ns

P

D

Package power dissipation@ T

A

≤ 25C 8 pin PDIP 1.0 W

8 pin SOIC 0.625 W

14 pin PDIP 1.6 W

14 pin SOIC 1.0 W

R

THJA

Thermal resistance, junction-to-ambient 8 pin PDIP 125

o

C/W

8 pin SOIC 200

o

C/W

14 pin PDIP 75

o

C/W

14 pin SOIC 120

o

C/W

T

J

Junction Temperature 150

o

C

T

S

Storage temperature -55 150

o

C

T

L

Lead temperature (soldering, 10 s) 300

o

C

Absolute Maximum Ratings

Recommended Operating Conditions

Symbol Definition Min Max Units

V

HS

High side floating supply offset voltage -200 600 V

V

CH

High side floating supply absolute voltage 10 30 V

V

HGO

High side floating output voltage V

HS

V

CH

V

CL

Low side fixed supply voltage 10 30 V

V

LGO

Low side output voltage 0 V

CL

V

DG

Logic supply offset voltage (P7, S7 only) V

LS

- 0.3 V

LS

+ 0.3 V

V

IN

Logic input voltage(HIN, LIN) V

DG

or LS V

CL

V

T

A

Ambient Temperature -40 125

o

C

5

IXD611

Precaution : When performing the high voltage tests, adequate safety precautions should be taken.

Symbol Definition Test Conditions Min Typ Max Units

V

INH

Logic “1” input voltage V

CL

= V

CH

= 15V 2.7 V

V

INL

Logic “0” input voltage V

CL

= V

CH

= 15V 2.4 V

V

HLGO /

/ V

HHGO

High level output voltage, I

O

= 20mA 0.22 0.3 V

V

CH

-V

HGO

or V

CL

-V

LGO

V

LLGO /

/ V

LHGO

Low level output voltage, I

O

= 20mA 0.16 0.25 V

V

HGO

or V

LGO

I

HL

HS to LS bias current. V

HS

= 600V 0.12 0.2 mA

I

QHS

Quiescent V

CH

supply current V

CH

= 15V V

IN

= 0V or V

IN

= 5 V 0.7 0.8 mA

I

QLS

Quiescent V

CL

supply current V

CL

= 15V V

IN

= 0V or V

IN

= 5 V 0.18 0.3 mA

I

IN

+ Logic “1” input bias current V

IN

= V

SUPPLY

= 15V 11 20 uA

I

IN

- Logic “0” input bias current V

IN

= 0V 1 2 uA

V

CHUV

+V

CH

supply undervoltage positive going threshold. 7.5 8 8.5 V

V

CHUV

-V

CH

supply undervoltage negative going threshold. 7 7.3 8 V

V

CLUV

+V

CL

supply undervoltage positive going threshold 7.5 8 8.5 V

V

CLUV

-V

CL

supply undervoltage negative going threshold. 7 7.5 8 V

V

CHUVH

, V

CLUVH

Undervoltage Hysteresis 0.3 0.6 V

I

GO

+ HS or LS Output high short circuit current; V

GO

= 15V, V

IN

= 5V, PW<10us 0.5 0.6 A

I

GO

- HS or LS Output low short circuit current; V

GO

= 15V, V

IN

= 0V, PW<10us -0.6 -0.5 A

Dynamic Electrical Characteristics

Symbol Definition Test Conditions Min Typ Max Units

t

on

Turn-on propagation delay V

CL

= V

CH

= 15V, C

LOAD

= 1nF 180 200 ns

t

off

Turn-off propagation delay V

CL

= V

CH

= 15V, C

LOAD

= 1nF 170 190 ns

t

r

Turn-on rise time V

CL

= V

CH

= 15V, C

LOAD

= 1nF 28 35 ns

t

f

Turn-off fall time V

CL

= V

CH

= 15V, C

LOAD

= 1nF 18 25 ns

t

dm

Delay matching, HS & LS turn-on/off C

LOAD

= 1nF 10 20 ns

Static Electrical Characteristics

6

IXD611

IXYS reserves the right to change limits, test conditions, and dimensions.

Timing Waveform Definitions

Figure 6. Definitions of Delay Matching WaveformsFigure 5. Definitions of Switching Time Waveforms

50% 50%

10%

90%

Outgoing Signal

HIN

LIN

HGOLGO

LGO HGO

tdm

50

%

50%

HIN

LIN

10% 10%

HGO

LGO

90% 90%

tdon

tdoff

tr

tf

Figure 4. INPUT/OUPUT Timing Diagram

~

300kHz 1MHz

600V

400V

0

f

PWM

V

+

B

u

s

(

V

)

H

S

a

m

p

l

e

T

e

s

t

e

d

f

o

r

O

p

e

r

a

t

i

o

n

500V

100kHz

Figure 7. Device operating range: Buss voltage vs. Frequency

Tested in typical circuit configuration (refer to Figure 9 & 10)

IXD611S1

IXD611S1

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