MAX1248/MAX1249
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
______________________________________________________________________________________ 19
UNIPOLAR MODE BIPOLAR MODE
Full Scale Zero Scale
Positive Zero Negative
Full Scale Scale Full Scale
VREF + COM COM
VREF / 2
COM
-VREF / 2
+ COM + COM
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
100 . . . 001
100 . . . 000
- FS
COM*
OUTPUT CODE
ZS = COM
+FS - 1LSB
INPUT VOLTAGE (LSB)
+ COM
FS
=
VREF
2
-FS = + COM
-VREF
2
1LSB =
VREF
1024
*COM VREF / 2
+3V
+3V
GND
SUPPLIES
DGND+3VDGNDCOM
AGNDV
DD
DIGITAL
CIRCUITRY
MAX1248
MAX1249
R* = 10
* OPTIONAL
Figure 17. Bipolar Transfer Function, Zero Scale (ZS) = COM,
Full Scale (FS) = VREF / 2 + COM
Figure 18. Power-Supply Grounding Connection
Table 7. Full Scale and Zero Scale
Layout, Grounding, and Bypassing
For best performance, use printed circuit boards.
Wire-wrap boards are not recommended. Board layout
should ensure that digital and analog signal lines are
separated from each other. Do not run analog and digi-
tal (especially clock) lines parallel to one another, or
digital lines underneath the ADC package.
Figure 18 shows the recommended system ground
connections. Establish a single-point analog ground
(star ground point) at AGND, separate from the logic
ground. Connect all other analog grounds and DGND
to the star ground. No other digital system ground
should be connected to this ground. For lowest noise
operation, the ground return to the star ground’s power
supply should be low impedance and as short as pos-
sible.
High-frequency noise in the V
DD
power supply may
affect the ADC’s high-speed comparator. Bypass the
supply to the star ground with 0.1µF and 1µF capaci-
tors close to pin 1 of the MAX1248/MAX1249. Minimize
capacitor lead lengths for best supply-noise rejection.
If the +3V power supply is very noisy, a 10resistor
can be connected as a lowpass filter (Figure 18).
High-Speed Digital Interfacing with QSPI
The MAX1248/MAX1249 can interface with QSPI using
the circuit in Figure 19 (f
SCLK
= 2.0MHz, CPOL = 0,
CPHA = 0). This QSPI circuit can be programmed to do a
conversion on each of the four channels. The result is
stored in memory without taxing the CPU, since QSPI
incorporates its own micro-sequencer.
The MAX1248/MAX1249 are QSPI compatible up to their
maximum external clock frequency of 2MHz.
MAX1248/MAX1249
TMS320LC3x Interface
Figure 20 shows an application circuit to interface the
MAX1248/MAX1249 to the TMS320 in external clock
mode. The timing diagram for this interface circuit is
shown in Figure 21.
Use the following steps to initiate a conversion in the
MAX1248/MAX1249 and to read the results:
1) The TMS320 should be configured with CLKX
(transmit clock) as an active-high output clock and
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR on the TMS320 are
tied together with the MAX1248/MAX1249’s SCLK
input.
2) The MAX1248/MAX1249’s CS pin is driven low by
the TMS320’s XF_ I/O port, to enable data to be
clocked into the MAX1248/MAX1249’s DIN.
3) An 8-bit word (1XXXXX11) should be written to the
MAX1248/MAX1249 to initiate a conversion and
place the device into external clock mode. Refer to
Table 1 to select the proper XXXXX bit values for
your specific application.
4) The MAX1248/MAX1249’s SSTRB output is moni-
tored via the TMS320’s FSR input. A falling edge on
the SSTRB output indicates that the conversion is in
progress and data is ready to be received from the
MAX1248/MAX1249.
5) The TMS320 reads in one data bit on each of the
next 16 rising edges of SCLK. These data bits rep-
resent the 10 + 2-bit conversion result followed by
four trailing bits, which should be ignored.
6) Pull CS high to disable the MAX1248/MAX1249 until
the next conversion is initiated.
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
20 ______________________________________________________________________________________
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
MAX1248
MAX1249
MC683XX
SCK
PCS0
MOSI
MISO
CLOCK CONNECTIONS NOT SHOWN
1
µ
F
0.1
µ
F
0.1
µ
F
(GND)
ANALOG
INPUTS
+3V
+3V
V
DD
CH0
CH1
CH2
CH3
COM
SHDN
VREF
SCLK
CS
DIN
SSTRB
DOUT
DGND
AGND
REFADJ
+2.5V
XF
CLKX
CLKR
DX
DR
FSR
CS
SCLK
DIN
DOUT
SSTRB
TMS320LC3x
MAX1249
Figure 20. MAX1248/MAX1249-to-TMS320 Serial Interface
Figure 19. MAX1248/MAX1249 QSPI Connections External Reference
MAX1248/MAX1249
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
______________________________________________________________________________________ 21
___________________________________________Ordering Information (continued)
Contact factory for availability of alternate surface-mount packages.
*
Contact factory for availability of CERDIP package, and for processing to MIL-STD-883B.
CS
SCLK
DIN
SSTRB
DOUT
START SEL2 SEL1 SEL0 UNI/BIP SGL/DIF PD1 PD0
MSB B8
B0
LSB
S1 S0
HIGH
IMPEDANCE
HIGH
IMPEDANCE
Figure 21. TMS320 Serial-Interface Timing Diagram
±116 Plastic DIP0°C to +70°CMAX1249BCPE
±1/216 Plastic DIP0°C to +70°C
MAX1249ACPE
±116 Plastic DIP-40°C to +85°CMAX1248BEPE
±1
±1/2
16 CERDIP*-55°C to +125°C
±1
16 CERDIP*-55°C to +125°C
±1/2
±1/2
INL
(LSB)
MAX1248BMJE
MAX1248AMJE
16 QSOP
16 QSOP
16 Plastic DIP
PIN-PACKAGETEMP. RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°CMAX1248BEEE
MAX1248AEEE
MAX1248AEPE
PART
INL
(LSB)
PIN-PACKAGETEMP. RANGEPART
±116 QSOP-40°C to +85°CMAX1249BEEE
±1/216 QSOP-40°C to +85°CMAX1249AEEE
±116 Plastic DIP-40°C to +85°CMAX1249BEPE
±116 CERDIP*-55°C to +125°CMAX1249BMJE
±1/2
±1/2
16 CERDIP*-55°C to +125°C
±1
16 Plastic DIP-40°C to +85°C
±1/2
MAX1249AMJE
MAX1249AEPE
16 QSOP
16 QSOP0°C to +70°C
0°C to +70°CMAX1249BCEE
MAX1249ACEE

MAX1249BEEE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 10-Bit 4Ch 133ksps 5.25V Precision ADC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union