REV. 0
a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
AD9860/AD9862
*
Mixed-Signal Front-End (MxFE
) Processor
for Broadband Communications
*Protected by U.S.Patent No.
MxFE is a trademark of Analog Devices, Inc.
GENERAL DESCRIPTION
The AD9860 and AD9862 (AD9860/AD9862) are versatile
integrated mixed-signal front-ends (MxFE) that are optimized
for broadband communication markets. The AD9860/AD9862
are cost effective, mixed signal solutions for wireless or wireline
standards based or proprietary broadband modem systems where
dynamic performance, power dissipation, cost, and size are all
critical attributes. The AD9860 has 10-bit ADCs and 12-bit DACs;
the AD9862 has 12-bit ADCs and 14-bit DACs.
The AD9860/AD9862 receive path (Rx) consists of two channels
that each include a high performance, 10-/12-bit, 64 MSPS analog-
to-digital converter (ADC), input buffer, Programmable Gain
Amplifier (RxPGA), digital Hilbert filter, and decimation filter. The
Rx can be used to receive real, diversity, or I/Q data at baseband or
low IF. The input buffers provide a constant input impedance for
both channels to ease impedance matching with external com-
ponents (e.g., SAW filter). The RxPGA provides a 20 dB gain
range for both channels. The output data bus can be multi-
plexed to accommodate a variety of interface types.
The AD9860/AD9862 transmit path (Tx) consists of two chan-
nels that contain high performance, 12-/14-bit, 128 MSPS
digital-to-analog converters (DAC), programmable gain amplifiers
(TxPGA), interpolation filters, a Hilbert filter, and digital mixers
for complex or real signal frequency modulation. The Tx latch
and demultiplexer circuitry can process real or I/Q data. Interpo-
lation rates of 2 and 4 are available to ease requirements on
an external reconstruction filter. For single channel systems, the
digital Hilbert filter can be used with an external quadrature
modulator to create an image rejection architecture. The two
12-/14-bit, high performance DACs produce an output signal
that can be scaled over a 20 dB range by the TxPGA.
A programmable delay-locked loop (DLL) clock multiplier and
integrated timing circuits enable the use of a single external
reference clock or an external crystal to generate clocking for all
internal blocks and also provides two external clock outputs.
Additional features include a programmable sigma-delta output,
four auxiliary ADC inputs and three auxiliary DAC outputs.
Device programmability is facilitated by a serial port interface
(SPI) combined with a register bank. The AD9860/AD9862 is
available in a space saving 128-lead LQFP.
FUNCTIONAL BLOCK DIAGRAM
Tx DATA
[0:13]
PGA
PGA
DAC
DAC
HILBERT
FILTER
LOGIC LOW
ADC
ADC
PGA
PGA
1x
1x
IOUT+A
IOUT–A
IOUT+B
IOUT–B
AUX_ADC_B2
AUX_ADC_B1
AUX_ADC_A2
AUX_ADC_A1
AUX_DAC_C
AUX_DAC_B
AUX_DAC_A
SIGDELT
VIN+A
VIN–A
VIN+B
VIN–B
-
AUX DAC
AUX DAC
AUX DAC
AUX ADC
AUX ADC
RxA DATA
[0:11]
RxB DATA
[0:11]
SPI
INTERFACE
OSC1
OSC2
CLKOUT1
CLKOUT2
SPI REGISTERS
CLOCK
DISTRIBUTION
BLOCK
DLL
1, 2, 4
Rx PATH
TIMING
Tx PATH
TIMING
AD9860/AD9862
HILBERT
FILTER
BYPASSABLE
DIGITAL
QUADRATURE
MIXER
BYPASSABLE
DIGITAL
QUADRATURE
MIXER
BYPASSABLE
LOW-PASS
INTERPOLATION
FILTER
NCO
FS/4
FS/8
BYPASSABLE LOW-PASS
DECIMATION FILTER
FEATURES
Mixed-Signal Front-End Processor with Dual Converter
Receive and Dual Converter Transmit Signal Paths
Receive Signal Path Includes:
Two 10-/12-Bit, 64 MSPS Sampling A/D Converters
with Internal or External Independent References,
Input Buffers, Programmable Gain Amplifiers,
Low-Pass Decimation Filters, and a Digital Hilbert Filter
Transmit Signal Path Includes:
Two 12-/14-Bit, 128 MSPS D/A Converters with
Programmable Full-Scale Output Current, Channel
Independent Fine Gain and Offset Control, Digital
Hilbert and Interpolation Filters, and Digitally Tunable
Real or Complex Up-Converters
Delay-Locked Loop Clock Multiplier and Integrated
Timing Generation Circuitry Allow for Single Crystal
or Clock Operation
Programmable Output Clocks, Serial Programmable
Interface, Programmable Sigma-Delta, Three Auxiliary
DAC Outputs and Two Auxiliary ADCs with Dual
Multiplexed Inputs
APPLICATIONS
Broadband Wireless Systems
Fixed Wireless, WLAN, MMDS, LMDS
Broadband Wireline Systems
Cable Modems, VDSL, PowerPlug
Digital Communications
Set-Top Boxes, Data Modems
5,969,657.
REV. 0–2–
AD9860/AD9862–SPECIFICATIONS
(V
A
= 3.3 V 5%, V
D
= 3.3 V 10%, f
DAC
= 128 MHz, f
ADC
= 64 MHz
Normal Timing Mode, 2 DLL Setting, R
SET
= 4 k, 50 DAC Load,
RxPGA = +6 dB Gain, TxPGA = +20 dB Gain.)
Test AD9860/AD9862
Tx PARAMETERS Temp Level Min Typ Max Unit
12-/14-BIT DAC CHARACTERISTICS
Resolution NA NA 12/14 Bits
Maximum Update Rate 128 MSPS
Full-Scale Output Current Full I 2 20 mA
Gain Error (Using Internal Reference) 25ºCI 5.5 +0.5 +5.5 %FS
Offset Error 25ºCI 1 0.0 +1 %FS
Reference Voltage (REFIO Level) 25ºCI 1.15 1.22 1.28 V
Negative Differential Nonlinearity (DNL) 25ºC III 0.5/0.5 LSB
Positive Differential Nonlinearity (+DNL) 25ºC III 1/2 LSB
Integral Nonlinearity (INL) 25ºC III ±1/±3 LSB
Output Capacitance 25ºC III 5 pF
Phase Noise @ 1 kHz Offset, 6 MHz Tone
Crystal and OSC IN Multiplier Enabled at 4 25ºC III 115 dBc/Hz
Output Voltage Compliance Range Full II 0.5 +1.5 V
TRANSMIT TxPGA CHARACTERISTICS
Gain Range 25ºC III 20 dB
Step Size Accuracy 25ºC III ±0.1 dB
Step Size 25ºC III 0.08 dB
Tx DIGITAL FILTER CHARACTERISTICS
Hilbert Filter Pass Band (<0.1 dB Ripple) Full II 12.5 38 % f
DATA
1
2/4 Interpolator Stop Band
2
Full II ±38 % f
DATA
DYNAMIC PERFORMANCE (A
OUT
= 20 mA FS, f = 1 MHz)
Differential Phase 25ºC III <0.1 Degree
Differential Gain 25ºC III <1 LSB
AD9860 Signal-to-Noise Ratio (SNR) Full I 68.2 70.7 dB
AD9860 Signal-to-Noise and Distortion Ratio Full I 62.5 66.1 dB
AD9860 Total Harmonic Distortion (THD) Full I 74.5 64.0 dB
AD9860 Wideband SFDR (to Nyquist)
1 MHz Analog Out, I
OUT
= 2 mA 25ºC III 70.6 dBc
1 MHz Analog Out, I
OUT
= 20 mA 25ºCI 64.4 75 dBc
6 MHz Analog Out, I
OUT
= 20 mA 25ºC III 75 dBc
AD9860 Narrowband SFDR (1 MHz Window)
1 MHz Analog Out, I
OUT
= 2 mA 25ºC III 70.2 dBc
1 MHz Analog Out, I
OUT
= 20 mA 25ºCI 83 90 dBc
AD9862 Signal-to-Noise Ratio (SNR) Full I 68.9 72.0 dB
AD9862 Signal-to-Noise and Distortion Ratio Full I 64.75 69.8 dB
AD9862 Total Harmonic Distortion (THD) Full I 75.5 65.0 dB
AD9862 Wideband SFDR (to Nyquist)
1 MHz Analog Out, I
OUT
= 2 mA 25ºC III 70.6 dBc
1 MHz Analog Out, I
OUT
= 20 mA 25ºCI 64.9 76.0 dBc
6 MHz Analog Out, I
OUT
= 20 mA 25ºC III 76.0 dBc
AD9862 Narrowband SFDR (1 MHz Window)
1 MHz Analog Out, I
OUT
= 2 mA 25ºC III 70.2 dBc
1 MHz Analog Out, I
OUT
= 20 mA 25ºCI 83 90 dBc
Rx PARAMETERS
RECEIVE BUFFER
Input Resistance (Differential) Full III 200 W
Input Capacitance (Each Input) Full III 5 pF
Maximum Input Bandwidth (3 dB) Full III 140 MHz
Analog Input Range (Best Noise Performance) Full II 2 V p-p Diff
Analog Input Range (Best THD Performance) Full II 1 V p-p Diff
RECEIVE PGA CHARACTERISTICS
Gain Error 25ºCI ±0.3 dB
Gain Range 25ºCI 19 20 21 dB
Step Size Accuracy 25ºCI ±0.2 dB
Step Size 25ºCI 1 dB
Input Bandwidth (3 dB, Rx Buffer Bypassed) 25ºC III 250 MHz
10-/12-BIT ADC CHARACTERISTICS
Resolution NA NA 10/12 Bits
Maximum Conversion Rate Full I 64
MHz
REV. 0
AD9860/AD9862
–3–
Test AD9860/AD9862
Rx PARAMETERS (continued) Temp Level Min Typ Max Unit
DC ACCURACY
Differential Nonlinearity 25ºC III ±0.3/±0.4 LSB
Integral Nonlinearity 25ºC III ±1.2/±5 LSB
Offset Error 25ºC III ±0.1 %FSR
Gain Error 25ºC III ±0.2 %FSR
Aperture Delay 25ºC III 2.0 ns
Aperture Uncertainty (Jitter) 25ºC III 1.2 ps rms
Input Referred Noise 25ºC III 250 µV
Reference Voltage Error
REFT-REFB Error (1 V) 25ºCI ±1 ±4mV
AD9860 DYNAMIC PERFORMANCE (A
IN
= 0.5 dBFS, f = 5 MHz)
Signal-to-Noise Ratio 25CI 59.0 60.66 dBc
Signal-to-Noise and Distortion Ratio 25CI 56.0 58.0 dBc
Total Harmonic Distortion 25CI 76.5 70.5 dBc
Spurious Free Dynamic Range 25CI 70.3 81.0 dBc
AD9862 DYNAMIC PERFORMANCE (A
IN
= 0.5 dBFS, f = 5 MHz)
Signal-to-Noise Ratio 25CI 62.6 64.2 dBc
Signal-to-Noise and Distortion Ratio 25CI 62.5 64.14 dBc
Total Harmonic Distortion 25CI 79.22 73.2 dBc
Spurious Free Dynamic Range 25CI 77.09 85.13 dBc
CHANNEL-TO-CHANNEL ISOLATION
Tx-to-Rx (A
OUT
= 0 dBFS, f
OUT
= 7 MHz) 25ºC III >90 dB
Rx Channel Crosstalk (f
1
= 6 MHz, f
2
= 9 MHz) 25ºC III >80 dB
PARAMETERS
CMOS LOGIC INPUTS
Logic 1 Voltage, V
IH
25ºCII
DRVDD 0.7
V
Logic 0 Voltage, V
IL
25ºCII 0.4 V
Logic 1 Current 25ºCII 12 µA
Logic 0 Current 25ºCII 12 µA
Input Capacitance 25ºC III 3 pF
CMOS LOGIC OUTPUTS (1 mA Load)
Logic 1 Voltage, V
OH
25ºCII
DRVDD 0.6
V
Logic 0 Voltage, V
OL
25ºCII 0.4 V
POWER SUPPLY
Analog Supply Currents
Tx (Both Channels, 20 mA FS Output) 25ºCI 70 76 mA
Tx Powered Down 25ºCI 2.5 5.0 mA
Rx (Both Channels, Input Buffer Enabled) 25ºCI 275 307 mA
Rx (Both Channels, Input Buffer Disabled) 25ºC III 245 mA
Rx (32 MSPS, Low Power Mode, Buffer Disabled) 25ºC III 155 mA
Rx (16 MSPS, Low Power Mode, Buffer Disabled) 25ºC III 80 mA
Rx Path Powered Down 25ºCI 5.0 6.0 mA
DLL 25ºC III 12 mA
Digital Supply Current
AD9860 Both Rx and Tx Path (All Channels Enabled)
2 Interpolation, f
DAC
= f
ADC
= 64 MSPS 25ºCI 92 112 mA
AD9862 Both Rx and Tx Path (All Channels Enabled)
2 Interpolation, f
DAC
= f
ADC
= 64 MSPS 25ºCI 104 124 mA
Tx Path (f
DAC
= 128 MSPS)
Processing Blocks Disabled 25ºC III 45 mA
4 Interpolation 25ºC III 90 mA
4 Interpolation, Coarse Modulation 25ºC III 110 mA
4 Interpolation, Fine Modulation 25ºC III 110 mA
4 Interpolation, Coarse and Fine Modulation 25ºC III 130 mA

AD9862BSTZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Front End - AFE Mixed Signal Front-End Processor
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union