NCP81152MNTWG

© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. 2
1 Publication Order Number:
NCP81152/D
NCP81152
Synchronous Buck Dual
MOSFET Driver
The NCP81152 is a high−performance dual MOSFET gate driver
optimized to drive the gates of both high−side and low−side power
MOSFETs in a synchronous buck converter. Two drivers are
co−packaged into a 2.5 mm x 3.5 mm QFN16 package that greatly
reduces the footprint compared to two discrete drivers. Adaptive
anti−cross−conduction circuitry and power saving operation provides
a low−switching−loss and high−efficiency solution for notebook
systems. The under−voltage lockout function guarantees the outputs
are low when the supply voltage is low.
Features
Adaptive Anti−Cross−Conduction Circuit
Integrated Bootstrap Diode
Zero Cross Detection
Floating Top Driver Accommodates Boost Voltages up to 35 V
Output Disable Control Turns Off Both MOSFETs
Under−voltage Lockout
Power Saving Operation Under Light Load Conditions
Thermally Enhanced Package
These are Pb−Free Devices
Typical Applications
Vcore Power for Notebook Systems
Power Systems for DDR and Graphics
Device Package Shipping
ORDERING INFORMATION
NCP81152MNTWG QFN16
(Pb−Free)
3000 / Tape &
Reel
QFN16
MN SUFFIX
CASE 485AW
MARKING DIAGRAM
www.onsemi.com
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
PIN CONNECTIONS
1
81152 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
81152
ALYWG
G
(Note: Microdot may be in either location)
SW1
GND1
DRVL1
DRVH2
SW2
GND2
PWM1
EN1
VCC1
BST2
PWM2
EN2
VCC2
DRVL2
BST1
DRVH1
(Top View)
FLAG
116
NCP81152
www.onsemi.com
2
Figure 1. Block Diagram
BST2
PWM2
Logic
DRVH2
SW2
Anti−Cross
Conduction
VCC2
DRVL2
VCC2
EN2
UVLO
Zero
Cross
Detection
BST1
PWM1
Logic
DRVH1
SW1
Anti−Cross
Conduction
VCC1
DRVL1
VCC1
EN1
UVLO
Zero
Cross
Detection
NCP81152
www.onsemi.com
3
Table 1. PIN DESCRIPTIONS
Pin No. Symbol Description
1, 5 BST1, BST2 Floating bootstrap supply pin for high−side gate driver. Connect the bootstrap capacitor between this pin
and the SW pin.
2, 6 PWM1, PWM2 Control input. The PWM signal has three states:
PWM = High enables the high−side FET;
PWM = Mid enables zero cross detection;
PWM = Low enables the low−side FET.
3, 7 EN1, EN2 Logic input. Three−state logic input:
EN = High enables the driver;
EN = Mid goes into diode braking mode (both high−side and low−side gate drive signals are low);
EN = Low disables the driver.
4, 8 VCC1, VCC2
Power supply input. Connect a bypass capacitor (0.1 mF) from this pin to ground.
9, 13 DRVL1, DRVL2 Low−side gate drive output. Connect to the gate of the low−side MOSFET.
10, 14 GND1, GND2 Bias and reference ground. All signals are referenced to this node.
11, 15 SW1, SW2 Switch node. Connect this pin to the source of the high−side MOSFET and drain of the low−side MOSFET.
12, 16 DRVH1, DRVH2 High−side gate drive output. Connect to the gate of the high−side MOSFET.
17 FLAG Thermal flag. There is no electrical connection to the IC. Connect to ground plane.
Table 2. ABSOLUTE MAXIMUM RATINGS
Pin Symbol Pin Name V
MAX
V
MIN
VCC1, VCC2 Main Supply Voltage Input 6.5 V −0.3 V
BST1, BST2 Bootstrap Supply Voltage 35 V wrt/ GND
40 V 50 ns wrt/ GND
6.5 V wrt/ SW
−0.3 V wrt/SW
SW1, SW2 Switching Node
(Bootstrap Supply Return)
35 V
40 V 50 ns
−5 V
−10 V (200 ns)
DRVH1, DRVH2 High Side Driver Output BST+0.3 V −0.3 V wrt/SW
−2 V (<200 ns) wrt/SW
DRVL1, DRVL2 Low Side Driver Output VCC+0.3 V −0.3 V DC
−5 V (<200 ns)
PWM1, PWM2 DRVH and DRVL Control Input 6.5 V −0.3 V
EN1, EN2 Enable Pin 6.5 V −0.3 V
GND1, GND2 Ground 0 V 0 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*All signals referenced to AGND unless noted otherwise.
Table 3. THERMAL INFORMATION
Parameter Symbol Value Unit
Thermal Characteristic (Note 1)
R
q
JA
29 °C/W
Operating Junction Temperature Range T
J
−40 to +150 °C
Operating Ambient Temperature Range T
A
−40 to +100 °C
Maximum Storage Temperature Range T
STG
−55 to +150 °C
Moisture Sensitivity Level − QFN Package MSL 1
*The maximum package power dissipation must be observed.
1. 1 in
2
Cu., 1 oz. thickness.

NCP81152MNTWG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Gate Drivers DUAL 5V MOSFET DRIVE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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