11
Figure25.RecommendedLEDdriveandapplicationcircuitforHCPL-3180.
Figure23.t
PLH
,t
PHL
,t
r
andt
f
testcircuitandwaveform.
Figure24.CMRtestcircuitandwaveform.
ApplicationsInformationEliminatingNegativeIGBTGate
Drive
To keep the IGBT firmly off, the HCPL-3180 has a very
low maximum V
OL
specification of 0.4 V. The HCPL-3180
realizes the very low V
OL
by using a DMOS transistor with
1 W (typical) on resistance in its pull down circuit. When
the HCPL-3180 is in the low state, the IGBT gate is shorted
to the emitter by R
g
+ 1 W. Minimizing R
g
and the lead
inductance from the HCPL-3180 to the IGBT gate and
emitter (possibly by mounting HCPL-3180 on a small PC
board directly above the IGBT) can eliminate the need for
negative IGBT gate drive in many applications as shown
in Figure 25. Care should be taken with such a PC board
design to avoid routing the IGBT collector or emitter
traces close to the HCPL-3180 input as this can result in
unwanted coupling of transient signals into the input of
HCPL-3180 and degrade performance.
(If the IGBT drain must be routed near the HCPL-3180
input, then the LED should be reverse biased when in the
off state to prevent the transient signals coupled from the
IGBT drain from turning on the HCPL-3180.)
0.1 µF
V
CC
= 20 V
10 Ω
1
3
I
F
= 10 to 16 mA
V
O
+
–
+
–
2
4
8
6
7
5
250 KHz
50% DUTY
CYCLE
500 Ω
10 nF
I
F
V
OUT
t
PHL
t
PLH
t
f
t
r
10%
50%
90%
0.1 µF
V
CC
= 20 V
1
3
I
F
V
O
+
–
+
–
2
4
8
6
7
5
A
+
–
B
V
CM
= 1500 V
5 V
V
CM
∆t
0 V
V
O
SWITCH AT B: I
F
= 0 mA
V
O
SWITCH AT A: I
F
= 10 mA
V
OL
V
OH
∆t
V
CM
δV
δt
=
+ HVDC
3-PHASE
AC
- HVDC
0.1 µF
V
CC
= 15 V
1
3
+
–
2
4
8
6
7
5
270 Ω
+5 V
CONTROL
INPUT
Rg
Q1
Q2
74XXX
OPEN
COLLECTOR