MAX110/MAX111
Low-Cost, 2-Channel, ±14-Bit Serial ADCs
______________________________________________________________________________________ 19
A 100ms conversion time cannot be achieved with either
10,240 CCPC or 20,480 CCPC modes because f
OSC
would be below the minimum 250kHz requirement.
When the gain calibration is performed, the conversion
times change approximately 1% to compensate for the
modulator’s gain error. This slightly degrades the line-
frequency rejection, because the corrected conversion
time is no longer an exact multiple of the line frequency.
Typically, the rejection of 50Hz/60Hz from the converter
is 55dB; i.e., if there is 100mV injection at the reference
or the analog input pin, it will cause an uncertainty of
±0.006%. If the system has large 50Hz/60Hz noise, the
use of internal auto gain calibration is not recommend-
ed. Instead, gain calibration should be done off-chip,
using numerical computation methods.
If you wish to use a configuration other than those sug-
gested in Table 6, you can accomplish similar 50Hz
and 60Hz line-frequency rejection off-chip by averag-
ing several conversions.
__________Applications Information
Layout, Grounding, Bypassing
For minimal noise, bypass each supply to GND with a
0.1µF capacitor. A ground plane should also be placed
under the analog circuitry. To minimize the coupling
effects of stray capacitance, keep digital lines as far
from analog components and lines as possible. Figure
10 shows the suggested power-supply and ground-
plane connections.
*R = 10
*OPTIONAL
DIGITAL
CIRCUITRY
POWER
SUPPLIES
V
DD
V
SS
+5V DGND
+5V -5V GND
GND
4.7µF
0.1µF
0.1µF
4.7µF
MAX110
Figure 10a. MAX110 Power-Supply Grounding Connections
*R = 10
*OPTIONAL
DIGITAL
CIRCUITRY
POWER
SUPPLIES
V
DD
AGND +5V DGND
+5V
GND
GND
4.7µF
0.1µF
MAX111
Figure 10b. MAX111 Power-Supply Grounding Connections
CCPC = Clock Cycles per Conversion
Table 6. Suggested XCLK Frequencies to Achieve Maximum Rejection of Both 50Hz/60Hz Line
Frequencies
MAX111 (t
CONVERT
= 200ms)
81,240 CCPC 102,400 CCPC
DIVIDER
RATIO
f
XCLK
(MHz)
RELATIVE
ACCURACY
(%)
f
XCLK
(MHz)
RELATIVE
ACCURACY
(%)
1:1 0.4062 0.030 0.512 0.030
2:1 0.8124 0.025 1.024 0.025
4:1 1.6248 0.022 2.048 0.023
MAX110 (t
CONVERT
= 100ms)
81,240 CCPC 102,400 CCPC
DIVIDER
RATIO
f
XCLK
(MHz)
RELATIVE
ACCURACY
(%)
f
XCLK
(MHz)
RELATIVE
ACCURACY
(%)
1:1 0.8124 0.025 1.024 0.065
2:1 1.6248 0.018 2.048 0.045
4:1 3.2496 0.016 4.096 0.030
MAX110/MAX111
Low-Cost, 2-Channel, ±14-Bit Serial ADCs
20 ______________________________________________________________________________________
Capacitive Loading Effects of XCLK in
Internal RC-Oscillator Mode
When using the internal RC oscillator, capacitive load-
ing effects on the XCLK pin must be minimized. Stray
capacitance causes the V
DD
power consumption to
increase by an amount p =
1
2
CV
2
f, where C = stray
capacitance, V is the supply voltage, and f is the fre-
quency of the internal RC oscillator.
External Reference
The reference inputs to the ADC are high impedance,
allowing both an external voltage reference and ratio-
metric applications without loading effects. The fully dif-
ferential analog signal and reference inputs are
advantageous for performing ratiometric conversions
(Figures 11 and 12). For example, when measuring
load cells, the bridge excitation and the ADC reference
input both share the same voltage source. As the exci-
tation changes with temperature or voltage, the output
of the load cell will change. But since the differential
reference voltage also changes, the conversion results
remain constant, all else remaining equal.
Weigh Scale Application
The fully differential analog signal and reference inputs
make the MAX111 easy to interface to transducers with
differential outputs, such as the load cell in Figure 11.
Because the ADC input is differential, the load cell only
requires differential gain, eliminating the need for the
difference amplifier (differential to single-ended con-
verter) of the standard three op-amp instrumentation-
amplifier realization.
The 30mV full-scale bridge output is amplified to 2V
full-scale and applied to the MAX111 channel-one
input. The reference voltage to the ADC is created by a
voltage divider connected to the +5V rail. The same 5V
provides excitation for the bridge; therefore, as the
excitation voltage varies, the reference voltage to the
ADC also varies, providing an ADC output that does
not depend on the supply voltage.
The two 121k resistors connected to the +5V supplies
shift the common-mode voltage from 2.5V (5V/2) to
1.5V to ensure linearity. Match these two resistors to
avoid introducing differential offset, or trim the resistor
mismatch with a potentiometer. In practice, the scale is
“zeroed” or “tared” by storing the average of several
conversions in a memory location while the scale is
+5V
30mV
FULL-SCALE
121k
2k
121k
49.9k
1k
22k
10k
1k
1k
1/2 MAX492
1/2 MAX492
1µF
1µF
REF+
REF-
IN1+
IN1-
AGND
CS
DIN
DOUT
SCLK
49.9k
V
DD
+5V
0.1µF
MAX111
+5V
+5V
+5V
GND
Figure 11. Weigh Scale Application
unloaded, and subtracting this value from actual weight
measurements. The lowpass filtering action of the
MAX111’s sigma-delta converter helps minimize noise.
The resolution of the weigh scale can be further
increased by averaging several conversions.
Thermocouple Circuit with Software
Compensation
A thermocouple is created by the junction of dissimilar
metals, and generates a voltage proportional to temper-
ature (Seebeck voltage), making it useful for tempera-
ture-measurement instruments. When a thermocouple
probe is connected to a measurement instrument, other
thermoelectric potentials are created between the alloys
of the probe and the copper connectors of the instru-
ment. These potentials introduce a temperature-depen-
dent error that must be subtracted from the temperature
measurement to obtain an accurate result. According to
the law of intermediate metals, the junction of the ther-
mocouple-probe alloys with the copper of the instrument
junction block can be treated as another thermocouple
of the same type. The voltage measured by the instru-
ment can be expressed as:
V = α(T1 - T
REF
)
where α is the Seebeck constant for the type of thermo-
couple, T1 is the temperature being measured, and
T
REF
is the temperature of the junction block. Although
one method to obtain T
REF
is to force the junction block
to a known temperature (0°C), a more popular
approach is to measure T
REF
directly using a thermistor
or PN junction voltage.
The circuit in Figure 12 shows a k-type thermocouple
going through a 54dB gain stage to channel 1 of the
MAX110. A MAX874 voltage reference provides both
the 3V reference voltage and reference junction tem-
perature information to the MAX110. Armed with the
temperature information provided by the MAX874, the
thermocouple voltage created at the junction block can
be subtracted out in software. The TEMP output of the
MAX874 is nominally 690mV at room temperature, and
increases with temperature at about 2.3mV/°C. Place
the MAX874 as close as possible to the terminal block,
and ensure good thermal contact between them. This
circuit employs a common k-type thermocouple and,
with the component values shown, can indicate tem-
peratures in the range of -150°C to +125°C.
MAX110/MAX111
Low-Cost, 2-Channel, ±14-Bit Serial ADCs
______________________________________________________________________________________ 21
243k
1k
1k
10k
1µF
1µF
IN1+
IN1-
REF-
REF+
V
SS
-5V
CS
DIN
DOUT
SCLK
243k
1M
1k
10k 10k
K-TYPE
V
DD
+5V
IN2-
IN2+
MAX110
1/4 MAX479
1/4 MAX479
1/4 MAX479
TEMP
OUT
V
IN
MAX874
+5V
Figure 12. Thermocouple Circuit with Software Compensation

MAX110AEWE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 2Ch +/-14Bit Serial
Lifecycle:
New from this manufacturer.
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