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LTC1142HVCG-ADJ#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
4
LTC1142/LTC1142L/LTC1142HV
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LTC1142, LTC1142HV
V
14
= V
OUT
+ 100mV (Forced) 25 mV
V
14
= V
OUT
– 100mV (Forced) 125 150 175 mV
V
SHDN
Shutdown Pin Threshold 0.55 0.8 2 V
t
OFF
Off-Time (Note 4) C
T
= 390pF, I
LOAD
= 700mA 3.8 5 6 µs
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
LTC1142CG: T
J
= T
A
+ (P
D
× 95°C/W)
Note 3: This current is for one regulator block. Total supply current is the
sum of Pins 10 and 24 currents. Dynamic supply current is higher due to
the gate charge being delivered at the switching frequency. See the
Applications Information section.
Note 4: In applications where R
SENSE
is placed at ground potential, the off-
time increases approximately 40%.
Note 5: The LTC1142/LTC1142L/LTC1142HV are guaranteed to meet
specified performance from 0°C to 70°C and are designed, characterized
and expected to meet these extended temperature limits, but are not tested
at –40°C and 85°C. Guaranteed I-grade parts are available, consult the
factory.
Note 6: The LTC1142L-ADJ allows operation down to V
IN
= 3.5V.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
5V Output Efficiency 3.3V Output Efficiency 5V Efficiency vs Input Voltage
3.3V Efficiency vs Input Voltage Load RegulationLine Regulation
LOAD CURRENT (A)
0.01
EFFICIENCY (%)
100
95
90
85
0.1 1
1142 G01
2
V
IN
= 6V
V
IN
= 10V
LOAD CURRENT (A)
0.01
EFFICIENCY (%)
100
95
90
85
0.1 1
1142 G02
2
V
IN
= 5V
V
IN
= 10V
INPUT VOLTAGE (V)
0
EFFICIENCY (%)
100
98
96
94
92
90
88
86
84
82
80
16
1142 G03
4
8
12
20
FIGURE 1 CIRCUIT
V
OUT
= 5V
I
LOAD
= 1A
I
LOAD
= 100mA
INPUT VOLTAGE (V)
0
EFFICIENCY (%)
100
98
96
94
92
90
88
86
84
82
80
16
1142 G04
4
8
12
20
FIGURE 1 CIRCUIT
V
OUT
= 3.3V
I
LOAD
= 1A
I
LOAD
= 100mA
INPUT VOLTAGE (V)
0
∆V
OUT
(mV)
40
30
20
10
0
–10
–20
–30
–40
16
1142 G05
4
8
12
20
FIGURE 1 CIRCUIT
I
LOAD
= 1A
LOAD CURRENT (A)
0
∆V
OUT
(mV)
20
0
–20
–40
–60
–80
–100
2.0
1142 G06
0.5
1.0
1.5
2.5
FIGURE 1 CIRCUIT
R
SENSE
= 0.05Ω
V
IN
= 6V
V
IN
= 6V
V
IN
= 12V
V
OUT
= 5V
V
OUT
= 3.3V
V
IN
= 12V
–40°C ≤ T
A
≤ 85°C (Note 5), V
10
= V
24
= 10V, unless otherwise noted.
5
LTC1142/LTC1142L/LTC1142HV
LTC1142/LTC1142HV
SENSE
+
3 (Pin 1): The (+) Input to the 3.3V Section
Current Comparator. A built-in offset between Pins 1 and
28 in conjunction with R
SENSE3
sets the current trip
threshold for the 3.3V section.
SHDN3 (Pin 2): When grounded, the 3.3V section oper-
ates normally. Pulling Pin 2 high holds both MOSFETs off
and puts the 3.3V section in micropower shutdown mode.
Requires CMOS logic-level signal with t
r
, t
f
< 1µs. Do not
“float” Pin 2.
PI FU CTIO S
UUU
SGND3 (Pin 3): The 3.3V section small-signal ground
must be routed separately from other grounds to the (–)
terminal of the 3.3V section output capacitor.
PGND3 (Pin 4): The 3.3V section driver power ground
connects to source of N-channel MOSFET and the (–)
terminal of the 3.3V section input capacitor.
NC (Pin 5): No Connection.
NDRIVE 3 (Pin 6): High Current Drive for Bottom N-Channel
MOSFET, 3.3V Section. Voltage swing at Pin 6 is from
ground to V
IN3
.
Operating Frequency vs
V
IN
– V
OUT
Current Sense Threshold Voltage
Supply Current in Shutdown
Off-Time vs Output Voltage
DC Supply Current
Gate Charge Supply Current
INPUT VOLTAGE (V)
0
SUPPLY CURRENT (mA)
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
2
10
14
1142 G07
8
18
4
6
12 16
PER REGULATOR BLOCK
NOT INCLUDING
GATE CHARGE CURRENT
PINS 10, 24
ACTIVE MODE
SLEEP MODE
INPUT VOLTAGE (V)
0
SUPPLY CURRENT (µA)
20
18
16
14
12
10
8
6
4
2
0
2
10
14
1142 G08
8
18
4
6
12 16
PER REGULATOR BLOCK
PINS 10, 24
V
SHUTDOWN
= 2V
V
IN
– V
OUT
VOLTAGE (V)
0
NORMALIZED FREQUENCY
12
1142 G09
2
68
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
4
10
70°C
0°C
25°C
V
OUT
= 5V
TEMPERATURE (°C)
0
SENSE VOLTAGE (mV)
175
150
125
100
75
50
25
0
80
1142 G12
20
40
60
100
MAXIMUM
THRESHOLD
MINIMUM
THRESHOLD
OUTPUT VOLTAGE (V)
0
OFF-TIME (µs)
80
70
60
50
40
30
20
10
0
4
1142 G11
1
2
3
5
V
SENSE
= V
OUT
V
OUT
= 5V
V
OUT
= 3.3V
OPERATING FREQUENCY (kHz)
20
GATE CHARGE CURRENT (mA)
140
28
24
20
16
12
8
4
0
1142 G10
80 260200
Q
N
+ Q
P
= 100nC
Q
N
+ Q
P
= 50nC
TYPICAL PERFOR A CE CHARACTERISTICS
UW
6
LTC1142/LTC1142L/LTC1142HV
NC (Pins 7, 8): No Connection.
PDRIVE 5 (Pin 9): High Current Drive for Top P-Channel
MOSFET, 5V Section. Voltage swing at this pin is from V
IN5
to ground.
V
IN5
(Pin 10): Supply pin, 5V section, must be closely
decoupled to 5V power ground Pin 18.
C
T5
(Pin 11): External capacitor C
T5
from Pin 11 to ground
sets the operating frequency for the 5V section. (The actual
frequency is also dependent upon the input voltage.)
INTV
CC5
(Pin 12) : Internal supply voltage for the 5V
section, nominally 3.3V, can be decoupled to signal ground,
Pin 17. Do not externally load this pin.
I
TH5
(Pin 13): Gain Amplifier Decoupling Point, 5V Sec-
tion. The 5V section current comparator threshold in-
creases with the Pin 13 voltage.
SENSE
–
5 (Pin 14): Connects to internal resistive divider
which sets the output voltage for the 5V section. Pin 14 is
also the (–) input for the current comparator on the
5V section.
SENSE
+
5 (Pin 15): The (+) Input to the 5V Section Current
Comparator. A built-in offset between Pins 15 and 14 in
conjunction with R
SENSE5
sets the current trip threshold
for the 5V section.
SHDN5 (Pin 16): When grounded, the 5V section operates
normally. Pulling Pin 16 high holds both MOSFETs off and
puts the 5V section in micropower shutdown mode.
Requires CMOS logic signal with t
r
, t
f
< 1µs. Do not “float”
Pin 16.
SGND5 (Pin 17): The 5V section small-signal ground must
be routed separately from other grounds to the (–) termi-
nal of the 5V section output capacitor.
PGND5 (Pin 18): The 5V section driver power ground
connects to source of N-channel MOSFET and the (–)
terminal of the 5V section input capacitor.
NC (Pin 19): No Connection.
NDRIVE 5 (Pin 20): High Current Drive for Bottom
N-Channel MOSFET, 5V Section. Voltage swing at Pin 20
is from ground to V
IN5
.
NC (Pins 21, 22): No Connection.
PDRIVE 3 (Pin 23): High Current Drive for Top P-Channel
MOSFET, 3.3V Section. Voltage swing at this pin is from
V
IN3
to ground.
V
IN3
(Pin 24): Supply pin, 3.3V section, must be closely
decoupled to 3.3V power ground, Pin 4.
C
T3
(Pin 25): External capacitor C
T3
from Pin 25 to ground
sets the operating frequency for the 3.3V section. (The
actual frequency is also dependent upon the input voltage.)
INTV
CC3
(Pin 26): Internal supply voltage for the 3.3V
section, nominally 3.3V, can be decoupled to signal ground,
Pin 3. Do not externally load this pin.
I
TH3
(Pin 27): Gain Amplifier Decoupling Point, 3.3V
Section. The 3.3V section current comparator threshold
increases with the Pin 27 voltage.
SENSE
–
3 (Pin 28): Connects to internal resistive divider
which sets the output voltage for the 3.3V section. Pin 28
is also the (–) input for the current comparator on the
3.3V section.
LTC1142HV-ADJ/LTC1142L-ADJ
SENSE
+
1 (Pin 1): The (+) Input to the Section 1 Current
Comparator. A built-in offset between Pins 1 and 28 in
conjunction with R
SENSE1
sets the current trip threshold
for this section.
V
FB1
(Pin 2): This pin serves as the feedback pin from an
external resistive divider used to set the output voltage for
section 1.
SHDN1 (Pin 3): When grounded, the section 1 regulator
operates normally. Pulling Pin 3 high holds both MOSFETs
off and puts this section in micropower shutdown mode.
Requires CMOS logic signal with t
r
, t
f
< 1µs. Do not “float”
Pin 3.
SGND1 (Pin 4): The section 1 small-signal ground must
be routed separately from other grounds to the (–) termi-
nal of the section 1 output capacitor.
PGND1 (Pin 5): The section 1 driver power ground con-
nects to source of N-channel MOSFET and the (–) terminal
of the section 1 input capacitor.
PI FU CTIO S
UUU
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

LTC1142HVCG-ADJ#TRPBF

Mfr. #:
Buy LTC1142HVCG-ADJ#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Adj HV Dual Hi Eff Sw Reg Control
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