MAX1400
+5V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
22 ______________________________________________________________________________________
Input Buffers
The MAX1400 provides a pair of input buffers to isolate
the inputs from the capacitive load presented by the
PGA/modulator (Figure 6). The buffers are chopper sta-
bilized to reduce the effect of their DC offsets and low-
frequency noise. Since the buffers can represent more
than 50% of the total analog power dissipation, they
may be shut down in applications where minimum
power dissipation is required and the capacitive input
load is not a concern. Disable the buffers in applications
where the inputs must operate close to AGND or V+.
When used in buffered mode, the buffers isolate the
inputs from the sampling capacitors. The sampling-
related gain error is dramatically reduced in this mode.
A small dynamic load remains from the chopper stabi-
lization. The multiplexer exhibits a small input leakage
current of up to 10nA. With high source resistances,
this leakage current may result in a DC offset.
Table 13c. R
EXT
, C
EXT
Values for Less than 16-Bit Gain Error in Unbuffered (BUFF = 0)
Mode—4x Modulator Sampling Frequency (MF1, MF0 = 10 ); X2CLK = 0; f
CLKIN
=
2.4576MHz
Table 13d. R
EXT
, C
EXT
Values for Less than 16-Bit Gain Error in Unbuffered (BUFF = 0)
Mode—8x Modulator Sampling Frequency (MF1, MF0 = 11); X2CLK = 0; f
CLKIN
=
2.4576MHz
R
EXT
C
EXT
R
MUX
C
PIN
MUXOUT
ADCIN
R
IN
C
ST
C
PIN
C
AMP
C
SAMPLE
C
C
Figure 6. Analog Input, Buffered Mode (BUFF = 1)
9.3 4.5
9.3 4.5 3.02
7.2 3.9
5.0 3.1 2.3
8, 16, 32,
64, 128
2.7
3.0
4
1
C
EXT
= 0pF C
EXT
= 50pF C
EXT
= 100pF
0.94 0.53
0.94 0.53 0.14
0.87 0.50
0.79 0.45 0.12
0.13
PGA GAIN
0.14
C
EXT
= 500pF C
EXT
= 1000pF C
EXT
= 5000pF
EXTERNAL RESISTANCE R
EXT
(k)
4.5 2.2
4.5 2.2 1.52
3.5 1.9
2.4 1.5 1.1
8, 16, 32,
64, 128
1.3
1.5
4
1
C
EXT
= 0pF C
EXT
= 50pF C
EXT
= 100pF
0.46 0.26
0.46 0.26 0.069
0.42 0.24
0.38 0.22 0.059
0.069
PGA GAIN
0.069
C
EXT
= 500pF C
EXT
= 1000pF C
EXT
= 5000pF
EXTERNAL RESISTANCE R
EXT
(k)
MAX1400
+5V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
______________________________________________________________________________________ 23
Reference Input
The MAX1400 is optimized for ratiometric measure-
ments and includes a fully differential reference input.
Apply the reference voltage across REFIN+ and REFIN-,
ensuring that REFIN+ is more positive than REFIN-.
REFIN+ and REFIN- must be between AGND and V+.
The MAX1400 is specified with a +2.5V reference when
operating with a +5V analog supply (V+).
Modulator
The MAX1400 performs analog-to-digital conversion
using a single-bit, second-order, switched-capacitor
modulator. A single comparator within the modulator
quantizes the input signal at a much higher sample rate
than the bandwidth of the signal to be converted. The
quantizer then presents a stream of 1s and 0s to the
digital filter for processing, to remove the frequency-
shaped quantization noise.
The MAX1400 modulator provides 2nd-order frequency
shaping of the quantization noise resulting from the sin-
gle bit quantizer. The modulator is fully differential for
maximum signal-to-noise ratio and minimum suscepti-
bility to power-supply noise.
The modulator operates at one of a total of eight differ-
ent sampling rates (f
M
) determined by the master clock
frequency (f
CLKIN
), the X2CLK bit, the CLK bit, and the
modulator frequency control bits MF1 and MF0. Power
dissipation is optimized for each of these modes by
controlling the bias level of the modulator. Table 15
shows the input and reference sample rates.
PGA
A programmable gain amplifier (PGA) with a user-
selectable gain of x1, x2, x4, x8, x16, x32, x64, or x128
(Table 6) precedes the modulator. Figure 8 shows the
default bipolar transfer function with the following illus-
trated codes: 1) PGA = 0, DAC = 0; 2) PGA = 3, DAC =
0; or 3) PGA = 3, DAC = 3.
Output Noise
Tables 16a and 16b show the rms noise for typical out-
put frequencies (notches) and -3dB frequencies for the
MAX1400 with f
CLKIN
= 2.4576MHz. The numbers
given are for the bipolar input ranges with V
REF
=
+2.50V, with no buffer (BUFF = 0) and with the buffer
inserted (BUFF = 1). These numbers are typical and
are generated at a differential analog input voltage of 0.
Figure 7 shows graphs of Effective Resolution vs. Gain
and Notch Frequency. The effective resolution values
were derived from the following equation:
Effective Resolution = (SNR
dB
- 1.76dB) / 6.02
The maximum possible signal divided by the noise of
the device, SNR
dB
, is defined as the ratio of the input
full-scale voltage (i.e., 2 x V
REFIN
/ GAIN) to the output
rms noise. Note that it is not calculated using peak-to-
peak output noise numbers. Peak-to-peak noise num-
bers can be up to 6.6 times the rms numbers, while
effective resolution numbers based on peak-to-peak
noise can be 2.5 bits below the effective resolution
based on rms noise, as quoted in the tables.
Table 14. R
EXT
, C
EXT
Values for Less than 16-Bit Gain Error in Buffered (BUFF = 1)
Mode—All Modulator Sampling Frequencies (MF1, MF0 = XX); X2CLK = 0; f
CLKIN
=
2.4576MHz
10 10
10 10 102
10 10 10
10
4
1
C
EXT
= 0pF C
EXT
= 50pF C
EXT
= 100pF
10 10
10 10 10
10 10 10
PGA GAIN
10
C
EXT
= 500pF C
EXT
= 1000pF C
EXT
= 5000pF
EXTERNAL RESISTANCE R
EXT
(k)
10 10
10 10 1016
10 10 10
10
32
8 10 10
10 10 10
10 10 10
10
10 10 1064
10 10 10128
10 10 10
10 10 10
MAX1400
+5V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
24 ______________________________________________________________________________________
Table 15. Modulator Operating Frequency, Sampling Frequency, and 16-Bit Data
Output Rates
1
0
MF0
1
0
0
1
1
0
1
1
MF1
0
0
1
0
1
0
400, 480153.6307.2
200, 24076.8153.6
2.4576 14.9152
2.4576 14.9152
160, 200
100, 12038.4
AVAILABLE
OUTPUT
DATA RATES
AT 16-BIT
ACCURACY
(sps)
MOD.
FREQ.
f
M
(kHz)
AIN/REFIN
SAMPLING
FREQ.
f
S
(kHz)
76.8
50, 6019.2
20, 25
80, 100
38.4
64128
32
1.024
64
2.4576
40, 501632
816
MCLK
FREQ.
X2CLK = 0
DEFAULT
f
CLKIN
(MHz)
CLK
MCLK
FREQ.
X2CLK = 1
f
CLKIN
(MHz)
14.9152
1.024
1.024
2.4576 1
4.9152
02.048
1.024 02.048
0
0
2.048
2.048
Table 16a. MAX1400 Noise vs. Gain and Output Data Rate—Unbuffered Mode,
V
REF
= 2.5V, f
CLKIN
= 2.4576MHz
PROGRAMMABLE GAIN
x1
x2 x4 x8 x16 x32 x64 x128
MF1:MF0 = 0
FS1:FS0 = 37.6813.9626.4751.42103.78203.74419.17820.7312584800
FS1:FS0 = 23.123.615.149.6718.9236.5469.17150.09628.82400
FS1:FS0 = 11.211.221.231.281.442.363.848.15125.7480
FS1:FS0 = 01.08
1.131.091.161.312.063.506.87104.8
400
MF1:MF0 = 3
FS1:FS0 = 37.38
13.8826.5751.17103.04200.51399.44816.66628.82400
FS1:FS0 = 22.793.385.209.4518.1135.9171.25141.69314.41200
FS1:FS0 = 11.091.091.141.151.342.044.167.0062.9240
FS1:FS0 = 01.01
0.981.021.071.261.964.006.2552.4
200
MF1:MF0 = 2
FS1:FS0 = 37.31
13.4024.5052.3899.75203.35405.49836.32314.41200
FS1:FS0 = 22.763.295.159.3419.1937.6973.86138.79157.2600
FS1:FS0 = 11.101.081.081.171.362.143.937.9131.4120
FS1:FS0 = 01.00
0.981.041.101.241.943.616.9826.2
100
MF1:MF0 = 1
FS1:FS0 = 37.43
13.2626.2550.91107.06216.88417.07844.82157.2600
FS1:FS0 = 22.753.545.059.5717.9135.1070.73147.6078.6300
FS1:FS0 = 11.101.101.121.201.362.213.947.2315.760
FS1:FS0 = 0
BIT
STATUS
0.99
TYPICAL OUTPUT NOISE IN µV
RMS
1.051.101.131.252.023.276.20
OUTPUT
DATA
RATE
(sps)
13.150
-3dB
FREQ.
(Hz)
Default condition is in bold print.

MAX1400CAI+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 18-Bit 5Ch 4.8ksps 2.5V Precision ADC
Lifecycle:
New from this manufacturer.
Delivery:
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