©2011 Silicon Storage Technology, Inc. DS25045A 09/11
9
8 Mbit SPI Serial Flash
SST25VF080B
Data Sheet
Microchip Technology Company
Instructions
Instructions are used to read, write (Erase and Program), and configure the SST25VF080B. The
instruction bus cycles are 8 bits each for commands (Op Code), data, and addresses. Prior to execut-
ing any Byte-Program, Auto Address Increment (AAI) programming, Sector-Erase, Block-Erase, Write-
Status-Register, or Chip-Erase instructions, the Write-Enable (WREN) instruction must be executed
first. The complete list of instructions is provided in Table 5. All instructions are synchronized off a high
to low transition of CE#. Inputs will be accepted on the rising edge of SCK starting with the most signif-
icant bit. CE# must be driven low before an instruction is entered and must be driven high after the last
bit of the instruction has been shifted in (except for Read, Read-ID, and Read-Status-Register instruc-
tions). Any low to high transition on CE#, before receiving the last bit of an instruction bus cycle, will
terminate the instruction in progress and return the device to standby mode. Instruction commands
(Op Code), addresses, and data are all input from the most significant bit (MSB) first.
Table 5: Device Operation Instructions
Instruction Description Op Code Cycle
1
1. One bus cycle is eight clock periods.
Address
Cycle(s)
2
2. Address bits above the most significant bit of each density can be V
IL
or V
IH
.
Dummy
Cycle(s)
Data
Cycle(s)
Read Read Memory 0000 0011b (03H) 3 0 1 to
High-Speed Read Read Memory at higher
speed
0000 1011b (0BH) 3 1 1 to
4 KByte Sector-Erase
3
3. 4KByte Sector Erase addresses: use A
MS
-A
12,
remaining addresses are don’t care but must be set either at V
IL
or V
IH.
Erase 4 KByte of
memory array
0010 0000b (20H) 3 0 0
32 KByte Block-Erase
4
4. 32KByte Block Erase addresses: use A
MS
-A
15,
remaining addresses are don’t care but must be set either at V
IL
or V
IH.
Erase 32 KByte block
of memory array
0101 0010b (52H) 3 0 0
64 KByte Block-Erase
5
5. 64KByte Block Erase addresses: use A
MS
-A
16,
remaining addresses are don’t care but must be set either at V
IL
or V
IH.
Erase 64 KByte block
of memory array
1101 1000b (D8H) 3 0 0
Chip-Erase Erase Full Memory Array 0110 0000b (60H) or
1100 0111b (C7H)
000
Byte-Program To Program One Data Byte 0000 0010b (02H) 3 0 1
AAI-Word-Program
6
Auto Address Increment
Programming
1010 1101b (ADH) 3 0 2 to
RDSR
7
Read-Status-Register 0000 0101b (05H) 0 0 1 to
EWSR Enable-Write-Status-Register 0101b 0000b (50H) 0 0 0
WRSR Write-Status-Register 0000 0001b (01H) 0 0 1
WREN Write-Enable 0000 0110b (06H) 0 0 0
WRDI Write-Disable 0000 0100b (04H) 0 0 0
RDID
8
Read-ID 1001 0000b (90H) or
1010 1011b (ABH)
301to
JEDEC-ID JEDEC ID read 1001 1111b (9FH) 0 0 3 to
EBSY Enable SO to output RY/BY#
status during AAI programming
0111 0000b (70H) 0 0 0
DBSY Disable SO as RY/BY#
status during AAI programming
1000 0000b (80H) 0 0 0
T5.0 25045
