Rev A 4/7/15 6 FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY
SYNTHESIZER
843003 DATA SHEET
Table 4C. LVPECL DC Characteristics, V
CC
= V
CCA
= V
CCO_A
= V
CCO_B
= 3.3V ± 5%, V
EE
= 0V, T
A
= 0°C to 70°C
NOTE 1: Outputs termination with 50 to V
CCO_A, _B
– 2V.
Table 5. Crystal Characteristics
NOTE: Characterized using an 18pF parallel resonant crystal.
AC Electrical Characteristics
Table 6. AC Characteristics, V
CC
= V
CCA
= V
CCO_A
= V
CCO_B
= 3.3V ± 5%, V
EE
= 0V, T
A
= 0°C to 70°C
NOTE 1: Defined as skew within a bank of outputs at the same voltages and with equal load conditions.
NOTE 2: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Please refer to the Phase Noise Plots.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Current; NOTE 1 V
CCO
– 1.4 V
CCO
– 0.9 µA
V
OL
Output Low Current; NOTE 1 V
CCO
– 2.0 V
CCO
– 1.7 µA
V
SWING
Peak-to-peak Output Voltage Swing 0.6 1.0 V
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
Frequency
FB_DIV = ÷20 28 31.25 35 MHz
FB_DIV = ÷24 23.33 26.04166 29.167 MHz
Equivalent Series Resistance (ESR) 50
Shunt Capacitance 7pF
Parameter Symbol Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency
DIV_SELx[1:0] = 00 560 700 MHz
DIV_SELx[1:0] = 01 280 350 MHz
DIV_SELx[1:0] = 10 140 175 MHz
DIV_SELx[1:0] = 11 112 140 MHz
tsk(b) Bank Skew, NOTE 1 20 ps
tsk(o) Output Skew; NOTE 2, 4 Outputs @ Same Frequency 35 ps
Outputs @ Different Frequencies 100 ps
tjit(Ø)
RMS Phase Jitter, (Random);
NOTE 3
625MHz, (1.875MHz – 20MHz) 0.42 ps
312.5MHz, (1.875MHz – 20MHz) 0.50 ps
156.25MHz, (1.875MHz – 20MHz) 0.51 ps
125MHz, (1.875MHz – 20MHz) 0.52 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 250 600 ps
odc Output Duty Cycle
DIV_SELx[1:0] = 00 40 60 %
DIV_SELx[1:0] 00 47 53 %