74AHC_AHCT259_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 22 July 2013 7 of 19
NXP Semiconductors 74AHC259-Q100; 74AHCT259-Q100
8-bit addressable latch
9. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74AHC259-Q100
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V 1.5 - - 1.5 - 1.5 - V
V
CC
= 3.0 V 2.1 - - 2.1 - 2.1 - V
V
CC
= 5.5 V 3.85 - - 3.85 - 3.85 - V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V - - 0.5 - 0.5 - 0.5 V
V
CC
= 3.0 V - - 0.9 - 0.9 - 0.9 V
V
CC
= 5.5 V - - 1.65 - 1.65 - 1.65 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
I
O
= 50 A; V
CC
= 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
I
O
= 50 A; V
CC
= 3.0 V 2.9 3.0 - 2.9 - 2.9 - V
I
O
= 50 A; V
CC
= 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
I
O
= 4.0 mA; V
CC
= 3.0 V 2.58 - - 2.48 - 2.40 - V
I
O
= 8.0 mA; V
CC
= 4.5 V 3.94 - - 3.80 - 3.70 - V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
I
O
= 50 A; V
CC
= 2.0 V - 0 0.1 - 0.1 - 0.1 V
I
O
= 50 A; V
CC
= 3.0 V - 0 0.1 - 0.1 - 0.1 V
I
O
= 50 A; V
CC
= 4.5 V - 0 0.1 - 0.1 - 0.1 V
I
O
= 4.0 mA; V
CC
= 3.0 V - - 0.36 - 0.44 - 0.55 V
I
O
= 8.0 mA; V
CC
= 4.5 V - - 0.36 - 0.44 - 0.55 V
I
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
=0Vto5.5V
- - 0.1 - 1.0 - 2.0 A
I
CC
supply current V
I
=V
CC
or GND; I
O
= 0 A;
V
CC
=5.5V
- - 4.0 - 40 - 80 A
C
I
input
capacitance
V
I
=V
CC
or GND - 3 10 - 10 - 10 pF
C
O
output
capacitance
-4- - - - -pF
74AHCT259-Q100
V
IH
HIGH-level
input voltage
V
CC
= 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V
V
IL
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
I
O
= 50 A 4.4 4.5 - 4.4 - 4.4 - V
I
O
= 8.0 mA 3.94 - - 3.80 - 3.70 - V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
I
O
= 50 A - 0 0.1 - 0.1 - 0.1 V
I
O
= 8.0 mA - - 0.36 - 0.44 - 0.55 V
74AHC_AHCT259_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 22 July 2013 8 of 19
NXP Semiconductors 74AHC259-Q100; 74AHCT259-Q100
8-bit addressable latch
10. Dynamic characteristics
I
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
=0Vto5.5V
- - 0.1 - 1.0 - 2.0 A
I
CC
supply current V
I
=V
CC
or GND; I
O
= 0 A;
V
CC
=5.5V
- - 4.0 - 40 - 80 A
I
CC
additional
supply current
per input pin; V
I
=V
CC
2.1 V;
other pins at V
CC
or GND;
I
O
=0A; V
CC
= 4.5 V to 5.5 V
- - 1.35 - 1.5 - 1.5 mA
C
I
input
capacitance
V
I
=V
CC
or GND - 3 10 - 10 - 10 pF
C
O
output
capacitance
-4- - - - -pF
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 11.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max Min Max
74AHC259-Q100
t
pd
propagation
delay
D to Qn; see Figure 5
[2]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 5.8 11.5 1.0 13.5 1.0 15.0 ns
C
L
= 50 pF - 7.3 14.5 1.0 17.0 1.0 18.5 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 4.1 7.5 1.0 9.0 1.0 10.0 ns
C
L
= 50 pF - 5.3 9.5 1.0 11.0 1.0 12.0 ns
An to Qn; see Figure 6
[2]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 7.5 14.5 1.0 17.0 1.0 18.5 ns
C
L
= 50 pF - 9.1 18.0 1.0 21.0 1.0 23.0 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 5.3 9.5 1.0 11.5 1.0 12.5 ns
C
L
= 50 pF - 6.5 11.5 1.0 13.5 1.0 15.0 ns
LE
to Qn; see Figure 7
[2]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 6.2 12.0 1.0 14.0 1.0 15.2 ns
C
L
= 50 pF - 7.7 15.5 1.0 17.5 1.0 19.0 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 4.3 8.0 1.0 9.5 1.0 10.5 ns
C
L
= 50 pF - 5.5 10.0 1.0 11.5 1.0 12.5 ns
74AHC_AHCT259_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 22 July 2013 9 of 19
NXP Semiconductors 74AHC259-Q100; 74AHCT259-Q100
8-bit addressable latch
t
pd
propagation
delay
MR to Qn; see Figure 8
[3]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 5.4 10.5 1.0 12.5 1.0 13.5 ns
C
L
= 50 pF - 7.0 13.5 1.0 15.5 1.0 17.0 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 3.9 7.0 1.0 8.5 1.0 9.5 ns
C
L
= 50 pF - 5.1 9.0 1.0 10.5 1.0 11.5 ns
t
W
pulse width LE HIGH or LOW;
see Figure 7
V
CC
= 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns
V
CC
= 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
MR
LOW; see Figure 8
V
CC
= 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns
V
CC
= 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
t
su
set-up time D, An to LE; see Figure 9
and Figure 10
V
CC
= 3.0 V to 3.6 V 4.0 - - 4.0 - 4.0 - ns
V
CC
= 4.5 V to 5.5 V 4.0 - - 4.0 - 4.0 - ns
t
h
hold time D, An to LE; see Figure 9
and Figure 10
V
CC
= 3.0 V to 3.6 V 1.0 - - 1.0 - 1.0 - ns
V
CC
= 4.5 V to 5.5 V 1.0 - - 1.0 - 1.0 - ns
C
PD
power
dissipation
capacitance
f
i
= 1 MHz; V
I
=GNDtoV
CC
[4]
-13- - - - -pF
74AHCT259-Q100; V
CC
= 4.5 V to 5.5 V
t
pd
propagation
delay
D to Qn; see Figure 5
[2]
C
L
= 15 pF - 4.1 7.5 1.0 9.0 1.0 10.0 ns
C
L
= 50 pF - 5.4 9.5 1.0 11.0 1.0 12.0 ns
An to Qn; see Figure 6
[2]
C
L
= 15 pF - 5.5 9.5 1.0 11.5 1.0 12.5 ns
C
L
= 50 pF - 6.6 12.0 1.0 14.0 1.0 15.5 ns
LE
to Qn; see Figure 7
[2]
C
L
= 15 pF - 4.3 8.0 1.0 9.5 1.0 10.4 ns
C
L
= 50 pF - 5.5 10.0 1.0 12.0 1.0 13.0 ns
MR
to Qn; see Figure 8
[3]
C
L
= 15 pF - 3.9 7.0 1.0 8.5 1.0 9.5 ns
C
L
= 50 pF - 5.1 9.0 1.0 10.5 1.0 11.5 ns
t
W
pulse width LE HIGH or LOW;
see Figure 7
5.0 - - 5.0 - 5.0 - ns
MR
LOW; see Figure 8 5.0 - - 5.0 - 5.0 - ns
Table 8. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 11.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max Min Max

74AHC259PW-Q100J

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Latches 8-bit addressable latch
Lifecycle:
New from this manufacturer.
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