13
FN8154.0
Application Section
S
T
A
R
T
S
T
O
P
DATA
A
C
K
A
C
K
SDA BUS
SIGNALS FROM
THE SLAVE
SIGNALS FROM
THE MASTER
0
A
C
K
WORD
ADDRESS
1
0
1
0
SLAVE
ADDRESS
DEVICE
ID
A0A1A2
FIGURE 11. BYTE WRITE SEQUENCE
A
C
K
S
T
A
R
T
S
T
O
P
DATA
S
T
A
R
T
SDA BUS
SIGNALS FROM
THE SLAVE
SIGNALS FROM
THE MASTER
WORD
ADDRESS
A
C
K
SLAVE
ADDRESS
0
1
010
DEVICE
ID
A
C
K
SLAVE
ADDRESS
1
1
010
DEVICE
ID
A0A1A2
A0A1A2
A
C
K
S
T
A
R
T
S
T
O
P
DATA
S
T
A
R
T
SDA BUS
SIGNALS FROM
THE SLAVE
SIGNALS FROM
THE MASTER
WORD
ADDRESS
A
C
K
SLAVE
ADDRESS
0
1
010
DEVICE
ID
A
C
K
SLAVE
ADDRESS
1
1
010
DEVICE
ID
A0A1A2
A0A1A2
FIGURE 12. READ SEQUENCE
DC-DC
#1
DC-DC
#2
DC-DC
#3
HOT SWAP
CONTROLLER
-48V BACKPLANE/COMMUNICATION BACKPLANE
OPTIONAL
SMBus
SMBus
H (OPTIONAL)
PRIMARY
I/O VOLTAGES
CORE VOLTAGES
SLAVE
ADDRESS
PULL UP
TO SET
ADDRESS HIGH
SYSTEM
COMPONENTS &
BOARD SUPPLIES
I/O SUPPLY
CORE SUPPLY
µP/
ASICs/
FPGA
VCORE
V I/O Primary
3.3V 5V 5V
2.7V
2.5V
2.0V
1.8V
1.25V
0.9V
3.3V
2.5V
1.35V
1.25V
L
M
RC DELAY
X80200
VDDH
VDDM
SETV
VDDL
GATEH_EN
SDA SCL
GND
A2
A0
ENS
GATE_L
GATE_M
GATE_H
VFB
REF
READY
FIGURE 13. TELECOM BACKPLACE/SYSTEM POWER SUPPLY VOLTAGE BASED POWER SEQUENCING
X80200, X80201, X80202, X80203, X80204
14
FN8154.0
DC-DC
#1
DC-DC
#2
DC-DC
#3
HOT SWAP
CONTROLLER
-48V BACKPLANE/COMMUNICATION BACKPLANE
OPTIONAL
SMBus
SMBus
H (OPTIONAL)
PRIMARY
I/O VOLTAGES
CORE VOLTAGES
SLAVE
ADDRESS
PULL UP
TO SET
ADDRESS HIGH
OPTION
FORCED
SEQUENCING
SYSTEM
COMPONENTS &
BOARD SUPPLIES
I/O SUPPLY
CORE SUPPLY
µP/
ASICs/
FPGA
VCORE
V I/O Primary
3.3V 5V 5V
2.7V
2.5V
2.0V
1.8V
1.25V
0.9V
3.3V
2.5V
1.35V
1.25V
VCORE
L
M
PGOOD1
PGOOD2
DELAY
VDDH
VDDM
SETV
VDDL
GATEH_EN
SDA SCL
GND
A2
A0
ENS
GATE_L
GATE_M
GATE_H
VFB
REF
READY
FIGURE 14. TELECOM BACKPLACE/SYSTEM POWER SUPPLY TIME BASED POWER SEQUENCING
X80200, X80201, X80202, X80203, X80204
15
FN8154.0
DC-DC
#1
OPTION
SMBus
SMBus
H (OPTIONAL)
PRIMARY
V I/O
V
ID4:ID0
SLAVE
ADDRESS
PULL UP
TO SET
ADDRESS HIGH
OPTIONAL
FORCED
SEQUENCING
SYSTEM
COMPONENTS &
BOARD SUPPLIES
VCORE
V I/O Primary
3.3V 5V 5V
2.7V
2.5V
2.0V
1.8V
1.25V
0.9V
3.3V
2.5V
1.35V
1.25V
DC-DC
#2
V
ID4:IDO
VCORE
PWRGD
SCL
SDA
VRM
POWER
SUPPLY
I/O SUPPLY
CORE SUPPLY
µP/
ASICs/
FPGA
M
POWER SEQUENCING (TIME BASED MODE)
USING POWER GOOD SIGNALS
DELAY
10
7,8,55-57
5
9
OUTEN
PGOOD1
53
NC
X80200
VDDH
VDDM
SETV
VDDL
GATEH_EN
SDA SCL
GND
A2
A0
ENS
GATE_L
GATE_M
GATE_H
VFB
REF
READY
FIGURE 15. POWER SEQUENCING OF VRM SUPPLIES
X80200, X80201, X80202, X80203, X80204

TPS3825-50DBVR

Mfr. #:
Manufacturer:
Texas Instruments
Description:
Supervisory Circuits Processor Sprvisry Circuits
Lifecycle:
New from this manufacturer.
Delivery:
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