MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
MP86885 Rev. 1.01 www.MonolithicPower.com 5
7/22/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
PIN FUNCTIONS
Pin # Name Description
1 PWM
Pulse Width Modulation. Leave PWM floating or drive to mid-state to put SW in high
impedance state.
2 EN On/Off Control. Pull low to place SW in a high impedance state.
3 CS Current Sense Output. Requires an external resistor.
4 VTEMP Single pin temperature sense output.
5 SYNC
Synchronous Low Switch. Leave open or pull high to enable. Pull low to enter diode
emulation mode.
6 FAULT#
Fault reporting on HS current limit, Over Temperature and VDD UVLO. It is an open-
drain output during normal operation and pull-low when fault occurred. Low side
current limit will not pull low fault pin.
7 AGND Analog Ground.
8 VDD
Internal Circuitry Voltage. Connect to VDRV thru 2.2Ω resistor and decouple with
1µF capacitor to AGND. Connect AGND and PGND at this point.
9 RIN
Current Sense Compensation. Connect a resistor from this pin to Vin to fine tune
current sense gain.
10 T1 Test pin. Connect to ground.
11 BST
Bootstrap. Requires a 0.22µF to 1µF capacitor to drive the power switch’s gate
above the supply voltage. Connects between SW and BST pins to form a floating
supply across the power switch driver.
12-15 SW Switch Output.
16 VDRV
Driver Voltage. Connect to 5V supply and decouple with 1µF to 4.7µF ceramic
capacitor.
17-28 PGND Power Ground.
29 IN
Supply Voltage. Place C
IN
close to the device to prevent large voltage spikes at the
input.
