AD7298BCPZ Datasheet AD7298BCPZ-RL7, AD7298BCPZ | P16-P18

AD7298

Rev. B | Page 15 of 24

Temperature Value Format

DRIVE

One LSB of the ADC corresponds to 0.25°C. The temperature

reading from the ADC is stored in a 12-bit twos complement

format to accommodate both positive and negative temperature

measurements. The temperature data format is provided in

Table 6.

The AD7298 also provides the V

DRIVE

feature. V

DRIVE

controls the

voltage at which the serial interface operates. V

DRIVE

allows the

ADC to easily interface to both 1.8 V and 3 V processors. For

example, if the AD7298 is operated with a V

of 3.3 V, the

DRIVE

pin can be powered from a 1.8 V supply.

This enables the AD7298 to operate with a larger dynamic

range with a V

of 3.3 V while still being able to interface to

1.8 V processors. Take care to ensure V

DRIVE

does not exceed

by more than 0.3 V (see the Absolute Maximum Ratings

section).

Table 6. Temperature Data Format

Temperature (°C) Digital Output

−40 1111 0110 0000

−25 1111 1001 1100

−10 1111 1101 1000

THE INTERNAL OR EXTERNAL REFERENCE

−0.25 1111 1111 1111

0 0000 0000 0000

The AD7298 can operate with either the internal 2.5 V on-chip

reference or an externally applied reference. The EXT_REF bit

in the control register is used to determine whether the internal

reference is used. If the EXT_REF bit is selected in the control

REF

pin. On power-up, the internal reference is enabled.

Suitable external reference sources for the AD7298 include

AD780, AD1582, ADR431, REF193, and ADR391.

+0.25 0000 0000 0001

+10 0000 0010 1000

+25 0000 0110 0100

+50 0000 1100 1000

+75 0001 0010 1100

+100 0001 1001 0000

+105 0001 1010 0100

+125 0001 1111 0100

The internal reference circuitry consists of a 2.5 V band gap

reference and a reference buffer. When the AD7298 operates in

internal reference mode, the 2.5 V internal reference is available

at the V

REF

pin, which should be decoupled to GND1 using a 10 F

capacitor. It is recommended that the internal reference be buffered

before applying it elsewhere in the system.

The temperature conversion formulas are as follows:

Positive Temperature = ADC Code/4

Negative Temperature = (4096 − ADC Code)/4

The previous formulas are for a V

REF

of 2.5 V only.

If an external reference is used, the temperature sensor requires

an external reference of between 2 V and 2.5 V for correct

operation. When an external reference of less than 2.5 V is

applied, the temperature results are calculated using the

following formula, where V

EXT_REF

is the value of the external

The internal reference is capable of sourcing up to 2 mA of

current when the converter is static. The reference buffer

requires 5.5 ms to power up and charge the 10 F decoupling

capacitor during the power-up time.

reference voltage.

15.2733.109

−

⎟

⎠

⎞

⎜

⎝

⎛

ADCCode

VeTemperatur

REFEXT

AD7298

Rev. B | Page 16 of 24

CONTROL REGISTER

The control register of the AD7298 is a 16-bit, write-only register. Data is loaded from the DIN pin of the AD7298 on the falling edge of

SCLK. The data is transferred on the DIN line at the same time that the conversion result is read from the part. The data transferred on

the DIN line corresponds to the AD7298 configuration for the next conversion. This requires 16 serial clocks for every data transfer. Only

the information provided on the first 16 falling clock edges (after the falling edge of

) is loaded to the control register. MSB denotes the

first bit in the data stream. The bit functions are outlined in and . On power-up, the default content of the control register

is all zeros.

Table 7 Table 8

Table 7. Control Register Bit Functions

MSB LSB

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

WRITE REPEAT CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 T

SENSE

DONTC DONTC EXT_REF T

SENSE

AVG PPD

Table 8. Control Register Bit Function Description

Bit Mnemonic Description

D15 WRITE

The value written to this bit determines whether the subsequent 15 bits are loaded to the control register. If this

bit is a 1, the following 15 bits are written to the control register; if it is a 0, then the remaining 15 bits are not

loaded to the control register and it remains unchanged.

D14 REPEAT This bit enables the repeated conversion of the selected sequence of channels.

D13 to

CH0 to CH7

These eight channel selection bits are loaded at the end of the current conversion and select which analog input

channel is to be converted in the next serial transfer, or they may select the sequence of channels for conversion in

the subsequent serial transfers. Each CHX bit corresponds to an analog input channel. A channel or sequence of

channels is selected for conversion by writing a 1 to the appropriate CHX bit/bits. Channel address bits

corresponding to the conversion result are output on DOUT prior to the 12 bits of data. The next channel to be

converted is selected by the mux on the 14

SCLK falling edge.

D4 T

SENSE

Writing a 1 to this bit enables the temperature conversion. When the temperature sensor is selected for

conversion, the T

SENSE

_BUSY pin goes high after the next CS falling edge to indicate that the conversion is in

progress; the previous conversion result can be read while the temperature conversion is in progress. Once

SENSE

_BUSY goes low, CS can be brought low 100 ns later to read the T

SENSE

conversion result.

4 to 3 DONTC Don’t care.

D2 EXT_REF

Writing a Logic 1 to this bit, enables the use of an external reference. The input voltage range for the external

reference is 1 V to 2.5 V. The external reference should not exceed 2.5 V or the device performance is affected.

D1 T

SENSE

AVG

Writing a 1 to this bit enables the temperature sensor averaging function. When averaging is enabled, the AD7298

internally computes a running average of the conversion results to determine the final T

SENSE

result (see the

Temperature Sensor Averaging section for more details). This mode reduces the influence of noise on the final

SENSE

result. Selecting this feature does not automatically select the T

SENSE

for conversion. The T

SENSE

bit must also be

set to start a temperature sensor conversion.

D0 PPD

This partial power-down mode is selected by writing a 1 to this bit in the control register. In this mode, some of

the internal analog circuitry is powered down. The AD7298 retains the information in the control register while in

partial power-down mode. The part remains in this mode until a 0 is written to this bit.

Table 9. Channel Address Bits

ADD3 ADD2 ADD1 ADD0 Analog Input Channel

0 0 0 0 V

IN0

0 0 0 1 V

IN1

0 0 1 0 V

IN2

0 0 1 1 V

IN3

0 1 0 0 V

IN4

0 1 0 1 V

IN5

0 1 1 0 V

IN6

0 1 1 1 V

IN7

1 0 0 0 T

SENSE

1 0 0 1 T

SENSE

with averaging enabled

AD7298

Rev. B | Page 17 of 24

MODES OF OPERATION

The AD7298 offers different modes of operation that are

designed to provide additional flexibility for the user. These

options can be chosen by programming the content of the

control register to select the desired mode.

TRADITIONAL MULTICHANNEL MODE OF

OPERATION

The AD7298 can operate as a traditional multichannel

ADC, where each serial transfer selects the next channel for

conversion. One must write to the control register to configure

and select the desired input channel prior to initiating any

conversions. In the traditional mode of operation, the

signal

is used to frame the first write to the converter on the DIN

pin.

In this mode of operation, the REPEAT bit in the control

is not in use. The data, which appears on the DOUT pin during

the initial write to the control register, is invalid. The first

falling edge initiates a write to the control register to configure

the device; a conversion is then initiated for the selected analog

input channel (V

IN0

) on the subsequent (2

)

falling edge; the

third

falling edge will have the result (V

IN2

) available for

reading. The AD7298 operates with one cycle latency, thus the

conversion result corresponding to each conversion is available

one serial read cycle after the cycle in which the conversion was

initiated.

As the device operates with one cycle latency, the control

conversion, which is initiated on the next

falling edge, but

the first bit of the corresponding result is not clocked out until

the subsequent falling

edge, as shown in . Figure 25

If more than one channel is selected in the control register, the

AD7298 converts all selected channels sequentially in ascending

order on successive

falling edges. Once all the selected

channels in the control register are converted, the AD7298

ceases converting until the user rewrites to the control register

to select the next channel for conversion. This operation is

shown in . DOUT returns all 1s if the sequence of

conversions is completed or if no channel is selected.

Figure 26

SCLK

DOUT

DIN

1 12 16 1 16 1 16 1 16

CONVERSION RESULT

FOR CHANNEL 4

CONVERSION RESULT

FOR CHANNEL 1

INVALID DATAINVALID DATA

DATA WRITTEN TO CONTROL

NO WRITE TO THE

CONTROL REGISTER

08754-009

NO WRITE TO THE

CONTROL REGISTER

Figure 25. Configuring a Conversion and Read with the AD7298. One channel selected for conversion.

SCLK

DOUT

DIN

112161 161 16

CONVERSION RESULT

FOR CHANNEL 1

CONVERSION RESULT

FOR CHANNEL 5

CONVERSION RESULT

FOR CHANNEL 2

INVALID DATAINVALID DATA

NO WRITE TO THE

CONTROL REGISTER

NO WRITE TO THE

CONTROL REGISTER

NO WRITE TO THE

CONTROL REGISTER

DATA WRITTEN TO CONTROL

SCLK

DOUT

DIN

116116

DATA WRITTEN TO CONTROL

08754-010

Figure 26. Configuring a Conversion and Read with the AD7298. Numerous channels selected for conversion.

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AD7298BCPZ

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Analog to Digital Converters - ADC 8-Ch 1 MSPS 10B SAR

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AD7298BCPZ

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