LT1766/LT1766-5
24
1766fc
When using R
C
, the maximum value has two limitations.
First, the combination of output capacitor ESR and R
C
may stop the loop rolling off altogether. Second, if the
loop gain is not rolled off suffi ciently at the switching
frequency, output ripple will peturb the V
C
pin enough to
cause unstable duty cycle switching similar to subharmonic
oscillations. If needed, an additional capacitor, C
F
, can be
added across the R
C
/C
C
network from the V
C
pin to ground
to further suppress V
C
ripple voltage.
With a tantalum output capacitor, the LT1766 already in-
cludes a resistor, R
C
and fi lter capacitor, C
F
, at the V
C
pin
(see Figures 10 and 11) to compensate the loop over the
entire V
IN
range (to allow for stable pulse skipping for high
V
IN
-to-V
OUT
ratios ≥10). A ceramic output capacitor can
still be used with a simple adjustment to the resistor R
C
for stable operation. (See Ceramic Capacitors section for
stabilizing LT1766). If additional phase margin is required,
a capacitor, C
FB
, can be inserted between the output and FB
pin but care must be taken for high output voltage applica-
tions. Sudden shorts to the output can create unacceptably
large negative transients on the FB pin.
For V
IN
-to-V
OUT
ratios <10, higher loop bandwidths are
possible by readjusting the frequency compensation
components at the V
C
pin.
When checking loop stability, the circuit should be op-
erated over the applications’s full voltage, current and
temperature range. Proper loop compensation may be
obtained by emperical methods as described in detail in
Application Notes 19 and 76.
CONVERTER WITH BACKUP OUTPUT REGULATOR
In systems with a primary and backup supply, for example,
a battery-powered device with a wall adapter input, the
output of the LT1766 can be held up by the backup supply
with the LT1766 input disconnected. In this condition, the
SW pin will source current into the V
IN
pin. If the SHDN pin
is held at ground, only the shut down current of 25μA will
be pulled via the SW pin from the second supply. With the
SHDN pin fl oating, the LT1766 will consume its quiescent
operating current of 1.5mA. The V
IN
pin will also source
current to any other components connected to the input
line. If this load is greater than 10mA or the input could
be shorted to ground, a series Schottky diode must be
added, as shown in Figure 12. With these safeguards,
the output can be held at voltages up to the V
IN
absolute
maximum rating.
BUCK CONVERTER WITH ADJUSTABLE SOFT-START
Large capacitive loads or high input voltages can cause
high input currents at start-up. Figure 13 shows a circuit
that limits the dv/dt of the output at start-up, controlling
the capacitor charge rate. The buck converter is a typical
confi guration with the addition of R3, R4, C
SS
and Q1.
As the output starts to rise, Q1 turns on, regulating switch
current via the V
C
pin to maintain a constant dv/dt at the
output. Output rise time is controlled by the current through
C
SS
defi ned by R4 and Q1’s V
BE
. Once the output is in
regulation, Q1 turns off and the circuit operates normally.
R3 is transient protection for the base of Q1.
5V, 1A
REMOVABLE
INPUT
C2
0.33μF
C
F
220pF
R3
54k
D1
10MQ060N
1766 F12
C3
2.2μF
R
C
2.2k
C
C
0.022μF
D3
10MQ060N
D2
1N4148W
L1
47μH
C1
100μF
10V
ALTERNATE
SUPPLY
R4
25k
R1
15.4k
R2
4.99k
BOOST
V
IN
LT1766
SHDN
SYNC
SW
BIAS
FB
V
C
GND
+
Figure 12. Dual Source Supply with 25μA Reverse Leakage
APPLICATIONS INFORMATION
