CY62187EV30 MoBL
®
64-Mbit (4 M × 16) Static RAM
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 001-48998 Rev. *K Revised October 27, 2015
64-Mbit (4 M × 16) Static RAM
Features
Very high speed
55 ns
Wide voltage range
2.2 V to 3.7 V
Ultra low standby power
Typical standby current: 8 A
Maximum standby current: 48 A
Ultra low active power
Typical active current: 7.5 mA at f = 1 MHz
Easy memory expansion with CE
1
, CE
2,
and OE features
Automatic power down when deselected
CMOS for optimum speed and power
Available in Pb-free 48-ball FBGA package
Functional Description
The CY62187EV30 is a high performance CMOS static RAM
organized as 4 M words by 16-bits. This device features
advanced circuit design to provide ultra low active current. It is
ideal for providing More Battery Life (MoBL
®
) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption by 99 percent when addresses are not toggling.
The device can also be put into standby mode when deselected
(CE
1
HIGH or CE
2
LOW or both BHE and BLE are HIGH). The
input and output pins (I/O
0
through I/O
15
) are placed in a high
impedance state when: deselected (CE
1
HIGH or CE
2
LOW),
outputs are disabled (OE
HIGH), both Byte High Enable and Byte
Low Enable are disabled (BHE
, BLE HIGH), or during a write
operation (CE
1
LOW, CE
2
HIGH and WE LOW).
To write to the device, take Chip Enables (CE
1
LOW and CE
2
HIGH) and Write Enable (WE) input LOW. If Byte Low Enable
(BLE
) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is
written into the location specified on the address pins (A
0
through
A
21
). If Byte High Enable (BHE) is LOW, then data from I/O pins
(I/O
8
through I/O
15
) is written into the location specified on the
address pins (A
0
through A
21
).
To read from the device, take Chip Enables (CE
1
LOW and CE
2
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE
) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appear
on I/O
0
to I/O
7
. If Byte High Enable (BHE) is LOW, then data from
memory appears on I/O
8
to I/O
15
. See the Truth Table on page
9 for a complete description of read and write modes.
For a complete list of related documentation, click here.
CY62187EV30 MoBL
®
Document Number: 001-48998 Rev. *K Page 2 of 19
4096K × 16
RAM Array
I/O
0
–I/O
7
ROW DECODER
A
8
A
7
A
6
A
5
A
2
COLUMN DECODER
A
11
A
12
A
13
A
14
A
15
SENSE AMPS
DATA-IN DRIVERS
OE
A
4
A
3
I/O
8
–I/O
15
WE
BLE
BHE
A
16
A
0
A
1
A
17
A
9
A
18
A
10
Power down
Circuit
CE
2
CE
1
A
20
A
19
A
21
Logic Block Diagram
CY62187EV30 MoBL
®
Document Number: 001-48998 Rev. *K Page 3 of 19
Contents
Pin Configuration .............................................................4
Product Portfolio ..............................................................4
Maximum Ratings .............................................................5
Operating Range ...............................................................5
Electrical Characteristics .................................................5
Capacitance ......................................................................6
Thermal Resistance ..........................................................6
AC Test Loads and Waveforms .......................................6
Data Retention Characteristics .......................................7
Data Retention Waveform ................................................7
Switching Characteristics ................................................8
Switching Waveforms ......................................................9
Truth Table ......................................................................12
Ordering Information ......................................................13
Ordering Code Definitions .........................................13
Package Diagram ............................................................14
Acronyms ........................................................................15
Document Conventions .................................................15
Units of Measure .......................................................15
Document History Page .................................................16
Sales, Solutions, and Legal Information ......................19
Worldwide Sales and Design Support ....................... 19
Products ....................................................................19
PSoC® Solutions ......................................................19
Cypress Developer Community .................................19
Technical Support .....................................................19

CY62187EV30LL-55BAXI

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
SRAM 64Mb 3V 55ns 4M x 16 LP SRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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