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AD7747ARUZ-REEL7

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AD7747
Rev. 0 | Page 6 of 28
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter Rating
Positive Supply Voltage V
DD
to GND −0.3 V to +6.5 V
Voltage on any Input or Output Pin to
GND
−0.3 V to V
DD
+ 0.3 V
ESD Rating (ESD Association Human Body
Model, S5.1)
2000 V
Operating Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
TSSOP Package θ
JA
(Thermal Impedance-to-Air)
128°C/W
TSSOP Package θ
JC
(Thermal Impedance-to-Case)
14°C/W
Peak Reflow Soldering Temperature
Pb Free (20 sec to 40 sec) 260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD7747
Rev. 0 | Page 7 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
05469-003
SCL
RDY
SHLD
TST
REFIN(+)
CIN1(–)
REFIN(–)
CIN1(+)
1
2
3
4
5
7
6
8
SDA
NC
VDD
GND
V
IN(–)
V
IN(+)
NC
NC
16
15
14
13
12
11
10
9
AD7747
TOP VIEW
(Not to Scale)
NC = NO CONNECT
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 SCL
Serial Interface Clock Input. Connects to the master clock line. Requires pull-up resistor if not already provided
in the system.
2
RDY
Logic Output. A falling edge on this output indicates that a conversion on enabled channel(s) has been finished
and the new data is available. Alternatively, the status register can be read via the 2-wire serial interface and the
relevant bit(s) decoded to query the finished conversion. If not used, this pin should be left as an open circuit.
3 SHLD
Capacitive Input Active AC Shielding. To eliminate the CIN parasitic capacitance to ground, the SHLD signal
can be used for shielding the connection between the sensor and CIN. If not used, this pin should be left as an
open circuit.
4 TST This pin must be left as an open circuit for proper operation.
5, 6
REFIN(+),
REFIN(−)
Differential Voltage Reference Input for the Voltage Channel (ADC). Alternatively, the on-chip internal reference
can be used for the voltage channel. These reference input pins are not used for conversion on capacitive
channel(s) (CDC). If not used, these pins can be left as an open circuit or connected to GND.
7 CIN1(−)
CDC Negative Capacitive Input. The measured capacitance is connected between the CIN1(−) pin and GND. If
not used, this pin should be left as an open circuit.
8 CIN1(+)
CDC Positive Capacitive Input. The measured capacitance is connected between the CIN1(+) pin and GND. If not
used, this pin should be left as an open circuit.
9, 10 NC Not Connected. These pins should be left as an open circuit.
11, 12 VIN(+), VIN(−)
Differential Voltage Input for the Voltage Channel (ADC). These pins are also used to connect an external
temperature sensing diode. If not used, these pins can be left as an open circuit or connected to GND.
13 GND Ground Pin.
14 VDD
Power Supply Voltage. This pin should be decoupled to GND, using a low impedance capacitor, for example in
combination with a 10 μF tantalum and a 0.1 μF multilayer ceramic.
15 NC Not Connected. This pin should be left as an open circuit.
16 SDA
Serial Interface Bidirectional Data. Connects to the master data line. Requires a pull-up resistor if not provided
elsewhere in the system.
AD7747
Rev. 0 | Page 8 of 28
TYPICAL PERFORMANCE CHARACTERISTICS
80
–80
–8 –7 –6 –5 –4 –3 –1–2 8
05469-004
INPUT CAPACITANCE (pF)
INL (ppm)
60
40
20
0
–20
–40
–60
01234567
Figure 4. Capacitance Input Integral Nonlinearity;
V
DD
= 5 V, CAPDAC = 0x3F
2000
–3000
–50 150
05469-005
TEMPERATURE (ºC)
GAIN ERROR (ppm)
1000
0
–1000
–2000
–25 0 25 50 75 100 125
GAIN TC ≈ –28ppm/ºC
Figure 5. Capacitance Input Gain Drift vs. Temperature;
V
DD
= 5 V, CIN(+) to GND = 8 pF
.20
–0.30
–50 150
05469-006
TEMPERATURE (ºC)
OFFSET ERROR (fF)
–25 0 25 50 75 100 125
.15
.10
.050
–0.05
–0.10
–0.15
–0.20
–0.25
Figure 6. Capacitance Input Offset Drift vs. Temperature;
V
DD
= 5 V, CIN(+) Open
10
–50
0 600500
05469-007
CAPACITANCE SHLD TO GND (pF)
CAP ERROR (fF)
0
–20
–10
–30
–40
50 100 150 200 250 300 350 400 450 550
2.7V
3.0V
3.3V
5.0V
Figure 7. Capacitance Input Error vs. Capacitance Between SHLD and GND;
CIN(+) to GND = 8 pF, V
DD
= 2.7 V, 3 V, 3.3 V, and 5 V
10
–50
0 600500
05469-008
CAPACITANCE SHLD TO GND (pF)
CAP ERROR (fF)
0
–20
–10
–30
–40
50 100 150 200 250 300 350 400 450 550
2.7V
3.0V
3.3V
5.0V
Figure 8. Capacitance Input Error vs. Capacitance Between SHLD and GND;
CIN(+) to GND = 25 pF, V
DD
= 2.7 V, 3 V, 3.3 V, and 5 V
10
–50
0 600500
05469-009
CAPACITANCE CIN TO SHLD (pF)
CAP ERROR (fF)
0
–20
–10
–30
–40
50 100 150 200 250 300 350 400 450 550
2.7V
3.0V
3.3V
5.0V
Figure 9. Capacitance Input Error vs. Capacitance Between CIN(+) and SHLD;
CIN(+) to GND = 8 pF, V
DD
= 2.7 V, 3 V, 3.3 V, and 5V
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29

AD7747ARUZ-REEL7

Mfr. #:
Buy AD7747ARUZ-REEL7
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized 24Bit w/ Temp Sensr
Lifecycle:
New from this manufacturer.
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