..... Document #: 38-07164 Rev. *A Page Page 4 of 12 of 12
Mode Selection Functions
The W158 supports the following operating modes controlled through the SEL133/100#, SEL0, and SEL1 inputs.
Notes:
2. Provided for board level “bed of nails” testing.
3. 48-MHz PLL disabled to reduce component jitter.
4. Normal” mode of operation.
5. TCLK is a test clock over driven on the X1 input during test mode. TCLK mode is based on 133-MHz CPU select logic.
6. Required for DC output impedance verification.
7. Range of reference frequency is min.=14.316, nominal = 14.31818 MHz, max.=14.32 MHz.
8. Frequency accuracy of 48 MHz is +167 PPM to match USB default.
Table 2. Select Functions
SEL133/100# SEL1 SEL0 Function
0 0 0 All Outputs Three-State
0 0 1 (Reserved)
0 1 0 Active 100-MHz, 48-MHz PLL Inactive
0 1 1 Active 100-MHz, 48-MHz PLL Active
1 0 0 Test Mode
1 0 1 (Reserved)
1 1 0 Active 133-MHz, 48-MHz PLL Inactive
1 1 1 Active 133-MHz, 48-MHz PLL Active
Table 3. Truth Table
SEL
133/100# SEL1 SEL0 CPU CPUdiv2 3V66 PCI 48MHz REF IOAPIC Notes
0 0 0 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z 2
0 0 1 n/a n/a n/a n/a n/a n/a n/a
0 1 0 100 MHz 50 MHz 66 MHz 33 MHz HI-Z 14.318 MHz 16.67 MHz 3
0 1 1 100 MHz 50 MHz 66 MHz 33 MHz 48 MHz 14.318 MHz 16.67 MHz 4, 7, 8
1 0 0 TCLK/2 TCLK/4 TCLK/4 TCLK/8 TCLK/2 TCLK TCLK16 5, 6
1 0 1 n/a n/a n/a n/a n/a n/a n/a
1 1 0 133 MHz 66 MHz 66 MHz 33 MHz HI-Z 14.318 MHz 16.67 MHz 3
1 1 1 133 MHz 66 MHz 66 MHz 33 MHz 48 MHz 14.318 MHz 16.67 MHz 4, 7, 8
Table 4. Maximum Supply Current
Condition
Max. 2.5V supply consumption
Max. discrete cap loads,
V
DDQ2
=2.625V
All static inputs=V
DDQ3
or GND
Max. 3.3V supply consumption
Max. discrete cap loads,
V
DDQ3
=3.465V or GND
Powerdown Mode
(PWRDWN#=0)
100 µA 200 µA
Full Active 100 MHz
SEL133/100#=0
SEL1, 0=11
CPU_STOP#, PCI_STOP#=1
75 mA 160 mA
Full Active 133 MHz
SEL133/100#=0
SEL1, 0=11
CPU_STOP#, PCI_STOP#=1
90 mA 160 mA
