Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250
and
A3251
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
V
PH
V+
t
V
PM
V
PL
0
T
d(1)
T
d(0)
T
d(P)
Figure 1. Pulse amplitudes and durations
PROGRAMMING PROTOCOL CHARACTERISTICS, T
A
= 25ºC, unless otherwise noted
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Programming Voltage
1
V
PL
Minimum voltage range during programming 4.5 5.0 5.5 V
V
PM
10 11 12 V
V
PH
23 25 26 V
Programming Current
2
I
PP
Maximum supply current during programming 500 mA
Pulse Width
t
d(0)
OFF time between programming bits 20 s
t
d(1)
Pulse duration (ON time) for enable, address, fuse
blowing or lock bits
20 s
t
d(P)
Pulse duration (ON time) for fuse blowing 100 300 s
Pulse Rise Time t
r
V
PL
to V
PM
;
V
PL
to V
PH
11 s
Pulse Fall Time t
f
V
PM
to V
PL
; V
PH
to V
PL
5––s
1
Programming voltages are measured at the VCC pin.
2
A bypass capacitor with a minimum capacitance of 0.1 F must be connected from VCC to the GND pin of the device in order to provide
the current necessary to blow the fuse.
Additional information on device programming and program-
ming products is available on www. allegromicro.com. Program-
ming hardware is available for purchase, and programming
software is available free of charge.
Programming Protocol
The operate switchpoint, B
OP
, can be field-programmed. To do
so, a coded series of voltage pulses through the VCC pin is used
to set bitfields in onboard registers. The effect on the device
output can be monitored, and the registers can be cleared and
set repeatedly until the required B
OP
is achieved. To make the
setting permanent, bitfield-level solid state fuses are blown, and
finally, a device-level fuse is blown, blocking any further cod-
ing. It is not necessary to program the release switchpoint, B
RP
,
because the difference between B
OP
and B
RP
, referred to as the
hysteresis, B
HYS
, is fixed.
The range of values between B
OP(min)
and B
OP(max)
is scaled to
64 increments. The actual change in magnetic flux (G) repre-
sented by each increment is indicated by B
RES
(see the Operating
Characteristics table; however, testing is the only method for
verifying the resulting B
OP
). For programming, the 64 incre-
ments are individually identified using 6 data bits, which are
physically represented by 6 bitfields in the onboard registers.
By setting these bitfields, the corresponding calibration value is
programmed into the device.
Three voltage levels are used in programming the device: a low
voltage, V
PL
, a minimum required to sustain register settings; a
mid-level voltage, V
PM
, used to increment the address counter
in the device; and a high voltage, V
PH
, used to separate sets of
V
PM
pulses (when short in duration) and to blow fuses (when
long in duration). A fourth voltage level, essentially 0 V, is used
to clear the registers between pulse sequences. The pulse values
are shown in the Programming Protocol Characteristics table and
in figure 1.
Code Programming. Each bitfield must be individually set. To
do so, a pulse sequence must be transmitted for each bitfield that
is being set to 1. If more than one bitfield is being set to 1, all
pulse sequences must be sent, one after the other, without allow-
ing V
CC
to fall to zero (which clears the registers).
The same pulse sequence is used to provisionally set bitfields as
is used to permanently set bitfield-level fuses. The only differ-
ence is that when provisionally setting bitfields, no fuse-blowing
pulse is sent at the end of the pulse sequence.
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250
and
A3251
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
The pulse sequences consist of the following groups of pulses:
1. An enable sequence.
2. A bitfield address sequence.
3. When permanently setting the bitfield, a long V
PH
fuse-blow-
ing pulse. (Note: Blown bit fuses cannot be reset.)
4. When permanently setting the bitfield, the level of V
CC
must
be allowed to drop to zero between each pulse sequence, in
order to clear all registers. However, when provisionally set-
ting bitfields, V
CC
must be maintained at V
PL
between pulse
sequences, in order to maintain the prior bitfield settings while
preparing to set additional bitfields.
Bitfields that are not set are evaluated as zeros. The bitfield-level
fuses for 0 value bitfields are never blown. This prevents inad-
vertently setting the bitfield to 1. Instead, blowing the device-
level fuse protects the 0 bitfields from being accidentally set in
the future.
When provisionally trying the calibration value, one pulse
sequence is used, using decimal values. The sequence for setting
the value 5
10
is shown in figure 2.
When permanently setting values, the bitfields must be set indi-
vidually, and 5
10
must be programmed as binary 101. Bit 3 is
set to 1 (000100
2
, which is 4
10
), then bit 1 is set to 1 (000001
2
,
which is 1
10
). Bit 2 is ignored, and so remains 0.Two pulse
sequences for permanently setting the calibration value 5 are
shown in figure 3. The final V
PH
pulse is maintained for a longer
period, enough to blow the corresponding bitfield-level fuse.
V
PH
V+
t
V
PM
V
PL
0
Encode 00100
2
(4
10
)
Enable
Address
Address
Blow BlowEnable
Encode 00001
2
(1
10
)
Figure 3. Pulse sequence to permanently encode calibration value 5 (101 binary, or
bitfield address 3 and bitfield address 1).
V
PH
V+
t
V
PM
V
PL
0
Try 5
10
Enable Address Clear
Optional
Monitoring
Figure 2. Pulse sequence to provisionally try calibration value 5.
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250
and
A3251
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
V
PH
V+
t
V
PM
V
PL
0
Address 1
Address 2
Address n ( 63)
Figure 5. Pulse sequence to select addresses
Falling edge of final B
OP
address digit
V
PH
V+
t
V
PM
V
PL
0
Encode Lock Bit
Enable
Address Blow
7 pulses 65 pulses
Figure 6. Pulse sequence to encode lock bit
Lock Bit Programming. After the desired B
OP
calibration value
is programmed, and all of the corresponding bitfield-level fuses
are blown, the device-level fuse should be blown. To do so, the
lock bit (bitfield address 65) should be encoded as 1 and have
its fuse blown. This is done in the same manner as permanently
setting the other bitfields, as shown in figure 6.
Address Selection. After addressing mode is enabled, the
target bitfield address, is indicated by a series of VPM pulses,
as shown in figure 3. When provisionally trying a value, this
sequence is followed by a short V
PH
pulse, which serves to
delimit the address and set the corresponding bitfield. When
permanently setting a bitfield, the V
PH
pulse is continued for a
longer period of time, suffienct to not only set the bitfield to 1,
but also to blow the bitfield fuse.
Enabling Addressing Mode. The first segment of code is a
keying sequence used to enable the bitfield addressing mode. As
shown in figure 4, this segment consists of one short V
PH
pulse,
seven or more V
PM
pulses, and one short V
PH
pulse, with no
supply interruptions. This sequence is designed to prevent the
device from being programmed accidentally, such as by noise on
the supply line.
V
PH
V+
t
V
PM
V
PL
0
Minimum 7 pulses
Figure 4. Addressing mode enable pulse sequence

A3251LLTTR-T

Mfr. #:
Manufacturer:
Description:
MAGNETIC SWITCH UNIPOLAR SOT89-3
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