Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250
and
A3251
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Typical Characterization Data
Average I
CC(on)
vs. Temperature
0
2
4
6
8
10
-50
-20
10
40
70
100
130
160
I
CC
(
on
)
(
mA
)
I
CC(on)
@ 3.8 V
I
CC(on)
@ 12.0 V
I
CC(on)
@ 26.5 V
Average I
CC(off)
vs. Temperature
0
2
4
6
8
10
-50
-20
10
40
70
100
130
160
I
CC
(
off
)
(
mA
)
I
CC(off)
@ 3.8 V
I
CC(off)
@ 12.0 V
I
CC(off)
@ 26.5 V
Average V
OUT(SAT)
vs. Temperature
V
CC
= 3.8 V, I
out
= 20 mA
140
160
180
200
220
240
260
280
-50
-20
10
40
70
100
130
160
V
OUT(SAT)
(mV)
T
A
(°C)
T
A
(°C)
T
A
(°C)
All data are taken with A3250 devices, the average of 3 lots, 30 pieces per lot
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250
and
A3251
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions Value Units
Package Thermal Resistance
R
θJA
Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W
Package LT, 1-layer PCB with copper limited to solder pads 180 ºC/W
Package LT, 2-layer PCB with 0.94 in
2
copper each side 78 ºC/W
6
7
8
9
2
3
4
5
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
20 40 60 80 100 120 140 160 180
T
A
(
ºC
)
Maximum Allowable V
CC
(V)
Power Derating Curve
(R
θJA
= 165 ºC/W)
1-layer PCB, Package UA
(R
θJA
= 180 ºC/W)
1-layer PCB, Package LT
(R
θJA
= 78 ºC/W)
2-layer PCB, Package LT
V
CC(min)
V
CC(max)
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
20 40 60 80 100 120 140 160 180
Temperature (°C)
Power Dissipation, P
D
(mW)
Power Dissipation
(R
θJA
= 1
6
5 ºC/W)
1-layer PCB, Package UA
(R
θJA
= 180 ºC/W)
1-
la
yer PCB, Pac
kage
LT
(R
θJ
A
=
78 ºC/W)
2-layer PCB, Pa
c
kage
L
T
B
OP
B
RP
B
HYS
V
OUT(off)
V
OUT
V
OUT(on)(sat)
Switch to Low
Switch to High
B+
V+
Hysteresis of ΔV
OUT
Switching Due to ΔB
Hysteresis Curves
A3250
B
OP
B
RP
B
HYS
Switch to High
Switch to Low
B+
V
OUT(off)
V
OUT
V
OUT(on)(sat)
V+
Hysteresis of ΔV
OUT
Switching Due to ΔB
A3251
Output voltage in relation to impinging magnetic flux density in a south polarity magnetic
field of sufficient strength. Transition through B
OP
must precede transition through B
RP
.
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250
and
A3251
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Functional Description
Chopper-Stabilized Technique
The Hall circuit is based on a Hall element, a small sheet of
semiconductor material in which a constant bias current flows
when a constant voltage source is applied. The output takes the
form of a voltage measured across the width of the Hall element,
and has negligible value in the absence of a magnetic field.
When a magnetic field is applied with flux lines at right angles
to the current in the Hall element, a small signal voltage directly
proportional to the strength of the magnetic field occurs at the
output of the Hall element.
This small signal voltage is disproportionally small relative to
the offset produced at the input of the device. This makes it very
difficult to process the signal and maintain an accurate, reliable
output over the specified temperature and voltage range. There-
fore, it is important to reduce any distortion of the signal that
could be amplified when the signal is processed.
Chopper stabilization is a unique approach used to minimize
input offset on the Hall IC. This technique removes a key
source of output drift due to temperature and mechanical stress,
and produces a 3X reduction in offset in comparison to other,
conventional methods.
This offset reduction chopping technique is based on a sig-
nal modulation-demodulation process. The undesired offset
signal is separated from the magnetically-induced signal in the
frequency domain. The offset (and any low-frequency noise)
component of the signal can be seen as signal distortion added
after the signal modulation process has taken place. Therefore,
the DC offset is not modulated and remains a low-frequency
component. Consequently, the signal demodulation process acts
as a modulation process for the offset, causing the magnetically-
induced signal to recover its original spectrum at baseband while
the DC offset becomes a high-frequency signal. Then, the signal
passes using a low-pass filter, while the modulated DC offset is
suppressed.
The advantage of this approach is significant offset reduction,
which desensitizes the Hall IC against the effects of temperature
and mechanical stress. The disadvantage is that this technique
features a demodulator that uses a sample-and-hold block to
store and recover the signal. This sampling process can slightly
degrade the SNR (signal-to-noise ratio) by producing replicas of
the noise spectrum at the baseband. This degradation is a function
of the ratio between the white noise spectrum and the sampling
frequency. The effect of the degradation of the SNR is higher
jitter, also known as signal repeatability. However, the jitter in a
continuous-time device can be 5X that of the A3250/A3251.
Chopper stabilization circuit (dynamic quadrature offset cancellation)
Amp
Regulator
Sample and
Hold / LPF

A3251LLTTR-T

Mfr. #:
Manufacturer:
Description:
MAGNETIC SWITCH UNIPOLAR SOT89-3
Lifecycle:
New from this manufacturer.
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