where f
MIN
is the minimum operating frequency range.
In the circuit of Figure 1, the transformer’s turns ratio is
93 and its secondary leakage inductance is approxi-
mately 300mH. To set the minimum operating frequen-
cy to 45kHz, use 1µF for C2.
The parallel capacitor C3 sets the maximum operating
frequency, which is also the parallel resonant peak fre-
quency. Choose C3 with the following equation:
In the circuit of Figure 1, to set the maximum operating
frequency to 65kHz, use 18pF for C3.
The transformer core saturation should also be consid-
ered when selecting the operating frequency. The pri-
mary winding should have enough turns to prevent
transformer saturation under all operating conditions.
Use the following expression to calculate the minimum
number of turns N1 of the primary winding:
where D
MAX
is the maximum duty cycle (approximately
0.4) of the high-side switches, V
IN(MAX)
is the maximum
DC input voltage, B
S
is the saturation flux density of the
core, and S is the minimal cross-section area of the core.
COMP Capacitor Selection
The COMP capacitor sets the speed of the current loop
that is used during startup, while maintaining lamp cur-
rent regulation, and during transients caused by
changing the input voltage. The typical COMP capaci-
tor value is 0.01µF. Larger values increase the tran-
sient-response delays. Smaller values speed up
transient response, but extremely small values can
cause loop instability.
Other Components
The external bootstrap circuits formed by D1 and
C5/C6 in Figure 1 power the high-side MOSFET drivers.
Connect V
DD
to BST1/BST2 through dual-diode D1 and
couple BST1/BST2 to LX1/LX2 through C5 and C6. C5
= C6 = 0.1µF or greater.
Layout Guidelines
Careful PC board layout is important to achieve stable
operation. The high-voltage section and the switching
section of the circuit require particular attention. The
high-voltage sections of the layout need to be well sep-
arated from the control circuit. Most layouts for single-
lamp notebook displays are constrained to long and
narrow form factors, so this separation occurs naturally.
Follow these guidelines for good PC board layout:
1) Keep the high-current paths short and wide, espe-
cially at the ground terminals. This is essential for
stable, jitter-free operation and high efficiency.
2) Use a star-ground configuration for power and ana-
log grounds. The power and analog grounds
should be completely isolated—meeting only at the
center of the star. The center should be placed at
the analog ground pin (GND). Using separate cop-
per islands for these grounds may simplify this task.
Quiet analog ground is used for V
CC
, COMP,
FREQ, TFLT, and ILIM (if a resistive voltage-divider
is used).
3) Route high-speed switching nodes away from sen-
sitive analog areas (V
CC
, COMP, FREQ, TFLT, and
ILIM). Make all pin-strap control input connections
(ILIM, etc.) to analog ground or V
CC
rather than
power ground or V
DD
.
4) Mount the decoupling capacitor from V
CC
to GND
as close as possible to the IC with dedicated traces
that are not shared with other signal paths.
5) The current-sense paths for LX1 and LX2 to GND
must be made using Kelvin sense connections to
guarantee the current-limit accuracy.
6) Ensure the feedback connections are short and
direct. To the extent possible, IFB, VFB, and ISEC
connections should be far away from the high-volt-
age traces and the transformer.
7) To the extent possible, high-voltage trace clearance
on the transformer’s secondary should be widely
separated. The high-voltage traces should also be
separated from adjacent ground planes to prevent
lossy capacitive coupling.
8) The traces to the capacitive voltage-divider on the
transformer’s secondary need to be widely separated
to prevent arcing. Moving these traces to opposite
sides of the board can be beneficial in some cases.
