4
LTC1405
1405fa
DIGITAL I PUTS AND OUTPUTS
UU
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Specifications are guaranteed for both dual supply and single supply
operation. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
POWER REQUIRE E TS
W
U
The ● denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. Specifications are guaranteed for both dual supply and single supply operation.
(Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
DD
Positive Supply Voltage (Note 10) 4.75 5.25 V
V
SS
Negative Supply Voltage Dual Supply Mode – 5.25 – 4.75 V
Single Supply Mode 0 V
I
DD
Positive Supply Current ● 23 28 mA
I
SS
Negative Supply Current ● 0.8 1.2 mA
P
D
Power Dissipation ● 115 145 mW
TI I G CHARACTERISTICS
W
U
The ● denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. Specifications are guaranteed for both dual supply and single supply operation.
(Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
SAMPLE
Sampling Frequency ● 0.02 5 MHz
t
CONV
Conversion Time ● 150 180 ns
t
ACQ
Acquisition Time ● 20 50 ns
t
H
CLK High Time (Note 9) ● 20 100 ns
t
L
CLK Low Time (Note 9) ● 20 100 ns
t
AD
Aperture Delay of Sample-and-Hold –250 ps
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below V
SS
or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below V
SS
or above V
DD
without latchup.
Note 4: When these pin voltages are taken below V
SS
they will be clamped
by internal diodes. This product can handle input currents greater than
100mA below V
SS
without latchup. GAIN is not clamped to V
DD
. When CLK
is taken above V
DD
, it will be clamped by an internal diode. The CLK pin
can handle input currents of greater than 100mA above V
DD
without
latchup.
Note 5: V
DD
= 5V, V
SS
= –5V or 0V, f
SAMPLE
= 5MHz, t
r
= t
f
= 5ns unless
otherwise specified.
I
IN
Digital Input Current V
IN
= 0V to V
DD
● ±10 µA
C
IN
Digital Input Capacitance 1.8 pF
V
OH
High Level Output Voltage 0V
DD
= 4.75V, I
O
= –10µA 4.74 V
0V
DD
= 4.75V, I
O
= –200µA ● 4.0 4.71 V
0V
DD
= 2.7V, I
O
= –10µA 2.6 V
0V
DD
= 2.7V, I
O
= –200µA ● 2.3 V
V
OL
Low Level Output Voltage 0V
DD
= 4.75V, I
O
= 160µA 0.05 V
0V
DD
= 4.75V, I
O
= 1.6mA ● 0.10 0.4 V
0V
DD
= 2.7V, I
O
= 160µA 0.05 V
0V
DD
= 2.7V, I
O
= 1.6mA ● 0.10 0.4 V
I
SOURCE
Output Source Current V
OUT
= 0V 50 mA
I
SINK
Output Sink Current V
OUT
= V
DD
35 mA
