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16
Figure 12. Principle of Bemf Measurement
Current Decay
Zero Current
Voltage Transient
ZOOM
Previous
Micro−Step
Coil Current Zero Crossing
Next
Micro−Step
t
I
COIL
V
BEMF
I
COIL
V
COIL
V
BB
|V
BEMF
|
t
t
Because of the relatively high re−circulation currents in
the coil during current decay, the coil voltage V
COIL
shows
a transient behavior. As this transient is not always desired
in application software, two operating modes can be selected
by means of the bit <SLAT> (see “SLA−transparency” in
Table 12). The SLA pin shows in “transparent mode” full
visibility of the voltage transient behavior. This allows a
sanity−check of the speed−setting versus motor operation
and characteristics and supply voltage levels. If the bit
“SLAT” is cleared, then only the voltage samples at the end
of each coil current zero crossing are visible on the
SLA−pin. Because the transient behavior of the coil voltage
is not visible anymore, this mode generates smoother Back
e.m.f. input for post−processing, e.g. by software.
In order to bring the sampled Back e.m.f. to a descent
output level (0 V to 5 V), the sampled coil voltage V
COIL
is
divided by 2 or by 4. This divider is set through a SPI bit
<SLAG>. (See Table 12)
The following drawing illustrates the operation of the
SLA−pin and the transparency−bit. “PWMsh” and
“Icoil=0” are internal signals that define together with SLAT
the sampling and hold moments of the coil voltage.
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17
PWMsh
SLAT
SLA−Pin
last
retained
retain last sample
previous output is
buf
Ssh Sh
Ch
Csh
SLAT
NOT (Icoil=0)
Icoil=0
PWMsh
SLA−Pin
div2
div4
t
t
Figure 13. Timing Diagram of SLA−Pin
SLAT = 1 => SLA−pin is “transparent” during
V
BEMF
sampling @ Coil Current Zero
Crossing. SLA−pin is updated “real−time”.
SLAT = 0 => SLA−pin is not “transparent”
during V
BEMF
sampling @ Coil Current Zero
Crossing. SLA−pin is updated when leaving
current−less state.
V
COIL
V
COIL
V
BEMF
sample
is
kept at SLA pin
Icoil=0
Warning, Error Detection and Diagnostics Feedback
Thermal Warning and Shutdown
When Junction temperature rises above T
TW
, the thermal
warning bit <TW> is set (Table 16 SPI Status Register 0). If
junction temperature increases above thermal shutdown
level, then the circuit goes in “Thermal Shutdown” mode
(<TSD>) and all driver transistors are disabled (high
impedance) (Table 16 SPI Status Register 2). The conditions
to reset flag <TSD> is to be at a temperature lower than T
TW
and to clear the <TSD> flag by reading it using any SPI read
command.
Overcurrent Detection
The overcurrent detection circuit monitors the load
current in each activated output stage. If the load current
exceeds the overcurrent detection threshold, then the
overcurrent flag is set and the drivers are switched off to
reduce the power dissipation and to protect the integrated
circuit. Each driver transistor has an individual detection bit
in the Table 16 SPI Status Registers 1 and SPI Status
Register 2 (<OVCXij> and <OVCYij>). Error condition is
latched and the microcontroller needs to clear the status bits
to reactivate the drivers.
Note: Successive reading the SPI Status Registers 1 and 2 in
case of a short circuit condition, may lead to damage to the
drivers.
Open Coil Detection
Open coil detection is based on the observation of 100%
duty cycle of the PWM regulator. If in a coil 100% duty cycle
is detected for longer than 32 ms the appropriate status bit in
the SPI status register is set (<OPENX> or <OPENY>).
(Table 16: SPI Status Register 0).
When the resistance of a motor coil is very large and the
battery voltage is low, it can happen that the motor driver is
not able to deliver the requested current to the motor. Under
these conditions the PWM controller duty cycle will be
100% and after 32 ms, the error pin and <OPENX>,
<OPENY> will flag this situation (motor current is kept
alive). This feature can be used to test if the operating
conditions (supply voltage, motor coil resistance) still allow
reaching the requested coil−current or else the coil−current
should be reduced.
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18
Charge Pump Failure
The charge pump is an important circuit that guarantees
low R
DS(on)
for all drivers, especially for low supply
voltages. If the supply voltage is too low or external
components are not properly connected to guarantee R
DS(on)
of the drivers, then the bit <CPFAIL> is set in the SPI Status
Register 0. Also after power−on−reset the charge pump
voltage will need some time to exceed the required
threshold. During that time <CPFAIL> will be set to “1”.
Error Output
This is an open drain digital output to flag a problem to the
external microcontroller. The signal on this output is active
low and the logic combination of:
NOT(ERR
) = <TW> OR <TSD> OR <OVCXij> OR
<OVCYij> OR <OPENi> OR <CPFAIL>
Logic Supply Regulator
The NCV70522DQ has an on−chip 5 V low−drop
regulator with external capacitor to supply the digital part of
the chip, some low−voltage analog blocks and external
circuitry. The voltage level is derived from an internal
bandgap reference. To calculate the available drive−current
for external circuitry, the specified I
load
should be reduced
with the consumption of internal circuitry (unloaded
outputs) and the loads connected to logic outputs. See
Table 5.
Power−On Reset (POR) Function
The open drain output pin POR/WD provides an “active
low” reset for external purposes. At powerup of
NCV70522DQ, this pin will be kept low for some time to
reset for example an external microcontroller. A small
analog filter avoids resetting due to spikes or noise on the
V
DD
supply.
Figure 14. Power−on−Reset Timing Diagram
VBB
VDD
t
t
V
DDH
V
DDL
POR/WD pin
t
PU
t
PD
< t
RF
t
POR
t
RF
Watchdog Function
The watchdog function is enabled/disabled through
<WDEN> bit (Table 13). Once this bit has been set to “1”
(watchdog enable), the microcontroller needs to re−write
this bit to clear an internal timer before the watchdog timeout
interval expires. In case the timer is activated and WDEN is
acknowledged too early (before t
WDPR
) or not within the
interval (after t
WDTO
), then a reset of the microcontroller
will occur through POR
/WD pin. In addition, a warm/cold
boot bit <WD> is available in Table 16 for further processing
when the external microcontroller is alive again.

NCV70522DQ004G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Motor / Motion / Ignition Controllers & Drivers SPI STEPPER DVR VREG
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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