Spread-Spectrum Crystal Multiplier
6 Maxim Integrated
DS1080L
Detailed Description
The DS1080L is a crystal multiplier with center spread-
spectrum capability. A 16MHz to 33.4MHz crystal is
connected to the X1 and X2 pins. Alternately, a 16MHz
to 33.4MHz clock can be applied to X1 in place of the
crystal. In such applications, X2 would be left open cir-
cuit. Using the CMSEL input, the user selects whether
the attached crystal or input clock is multiplied by 1, 2,
or 4. The DS1080L is capable of generating spread-
spectrum clocks from 16MHz to 134MHz.
The PLL can dither the output clock about its center fre-
quency at a user-selectable magnitude. Using the
SMSEL input, the user selects the dither magnitude.
The PDN input can be used to place the device into a
low-power standby mode where the SSO output is tri-
stated. If the PDN pin is open, the SSO output is active
but the spread-spectrum dithering is disabled. The
spread-spectrum dither rate is fixed at f
IN
/ 992 to keep
the dither rate above the audio frequency range. On
power-up, the output clock (SSO) remains three-stated
until the PLL reaches a stable frequency (f
SSO
) and
dither (f
DITHER
).
Applications Information
Crystal Selection
The DS1080L requires a parallel resonating crystal
operating in the fundamental mode, with an ESR of less
than 90!. The crystal should be placed very close to
the device to minimize excessive loading due to para-
sitic capacitances.
Oscillator Input
When driving the DS1080L using an external oscillator
clock, consider the input (X1) to be high impedance.
Crystal Capacitor Selection
The load capacitors C
L1
and C
L2
are selected based
on the crystal specifications (from the data sheet of the
crystal used). The crystal parallel load capacitance is
calculated as follows:
For the DS1080L use C
L1
= C
L2
= C
LX
.
In this case, the equation then reduces to:
where C
L1
= C
L2
= C
LX.
Equation 2 is used to calculate the values of C
L1
and
C
L2
based on values on C
L
and C
IN
noted in the data
sheet electrical specifications.
Power-Supply Decoupling
To achieve best results, it is highly recommended that
a decoupling capacitor is used on the IC power-supply
pins. Typical values of decoupling capacitors are
0.001µF and 0.1µF. Use a high-quality, ceramic, sur-
face-mount capacitor, and mount it as close as possi-
ble to the V
CC
and GND pins of the IC to minimize lead
inductance.
