7
LT1640AL/LT1640AH
Hot Circuit Insertion
When circuit boards are inserted into a live – 48V backplane,
the bypass capacitors at the input of the board’s power
module or switching power supply can draw huge tran-
sient currents as they charge up. The transient currents
can cause permanent damage to the board’s components
and cause glitches on the system power supply.
The LT1640A is designed to turn on a board’s supply
voltage in a controlled manner, allowing the board to be
safely inserted or removed from a live backplane. The chip
also provides undervoltage, overvoltage and overcurrent
protection while keeping the power module off until its
input voltage is stable and within tolerance.
+
V
EE
V
DD
LT1640AH PWRGD
UV = 37V
OV = 71V
SENSE
C1
150nF
25V
C3
0.1µF
100V
C4
100µF
100V
C5
100µF
16V
Q1
IRF530
R2
10
5%
R3
18k
5%
C2
3.3nF
100V
R4
562k
1%
R5
9.09k
1%
R6
10k
1%
R1
0.02
5%
4
3
2
OV
GND
GND
48V
UV
56
8
7
1
GATE DRAIN
VICOR
VI-J3D-CY
V
OUT
+
V
OUT
V
IN
+
5V
1640A F06a
GATE IN
V
IN
+
(SHORT PIN)
*
* DIODES INC. SMAT70A
43
21
Power Supply Ramping
The input to the power module on a board is controlled by
placing an external N-channel pass transistor (Q1) in the
power path (Figure 6a, all waveforms are with respect to
the V
EE
pin of the LT1640A). R1 provides current fault
detection and R2 prevents high frequency oscillations.
Resistors R4, R5 and R6 provide undervoltage and over-
voltage sensing. By ramping the gate of Q1 up at a slow
rate, the surge current charging load capacitors C3 and C4
can be limited to a safe value when the board makes
connection.
Resistor R3 and capacitor C2 act as a feedback network to
accurately control the inrush current. The inrush current
can be calculated with the following equation:
I
INRUSH
= (45µA • C
L
)/C2
where C
L
is the total load capacitance equal to C3 + C4 +
module input capacitance.
Figure 6a. Inrush Control Circuitry
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8
LT1640AL/LT1640AH
Capacitor C1 and resistor R3 prevent Q1 from momen-
tarily turning on when the power pins first make contact.
Without C1 and R3, capacitor C2 would pull the gate of Q1
up to a voltage roughly equal to V
EE
• C2/C
GS
(Q1) before
the LT1640A could power up and actively pull the gate
low. By placing capacitor C1 in parallel with the gate
capacitance of Q1 and isolating them from C2 using
resistor R3, the problem is solved. The value of C1 should
be:
VV
V
CC
INMAX TH
TH
GD
•+
()
2
where V
TH
is the MOSFET’s minimum gate threshold and
V
INMAX
is the maximum operating input voltage.
R3’s value is not critical and is given by (V
INMAX
+ V
GATE
)/
5mA.
The waveforms are shown in Figure 6b. When the power
pins make contact, they bounce several times. While the
contacts are bouncing, the LT1640A senses an
undervoltage condition and the GATE is immediately
pulled low when the power pins are disconnected.
Once the power pins stop bouncing, the GATE pin starts to
ramp up. When Q1 turns on, the GATE voltage is held
constant by the feedback network of R3 and C2. When the
DRAIN voltage has finished ramping, the GATE pin then
ramps to its final value.
Figure 6b. Inrush Control Waveforms
1640A F07b
CONTACT
BOUNCE
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LT1640AL/LT1640AH
V
EE
V
DD
LT1640AL
PWRGD
SENSE
C1
150nF
25V
C
L
100µF
100V
Q1
IRF530
R2
10
5%
R3
18k
5%
C2
3.3nF
100V
R4
562k
1%
R5
9.09k
1%
R6
10k
1%
R1
0.02
5%
4
3
2
OV = 71V
GND
48V
UV = 37V
OV
UV
5
C3
6
8
1
GATE DRAIN
1640A F08
+
7
GND
(SHORT PIN)
*
* DIODES INC. SMAT70A
R7
43
21
Figure 8. Extending the Short-Circuit Protection DelayFigure 7. Short-Circuit Protection Waveforms
1640A F07
Electronic Circuit Breaker
The LT1640A features an electronic circuit breaker func-
tion that protects against short circuits or excessive sup-
ply currents. By placing a sense resistor between the V
EE
and SENSE pin, the circuit breaker will be tripped when-
ever the voltage across the sense resistor is greater than
50mV for more than 3µs as shown in Figure 7.
Note that the circuit breaker threshold should be set
sufficiently high to account for the sum of the load current
and the inrush current. If the load current can be controlled
by the PWRGD/PWRGD pin (as in Figure 6a), the threshold
can be set lower, since it will never need to accommodate
inrush current and load current simultaneously.
When the circuit breaker trips, the GATE pin is immediately
pulled to V
EE
and the external N-channel turns off. The
GATE pin will remain low until the circuit breaker is reset
by pulling UV low, then high or cycling power to the part.
If more than 3µs deglitching time is needed to reject
current noise, an external resistor and capacitor can be
added to the sense circuit as shown in Figure 8. R7 and C3
act as a lowpass filter that will slow down the SENSE pin
voltage from rising too fast. Since the SENSE pin will
source current, typically 20µA, there will be a voltage drop
on R7. This voltage will be counted into the circuit breaker
trip voltage just as the voltage across the sense resistor.
A small resistor is recommended for R7. A 100 for R7
will cause a 2mV error. The following equation can be used
to estimate the delay time at the SENSE pin:
tRCIn
Vt Vt
VVt
O
iO
=
–•
() ( )
–()
1
Where V(t) is the circuit breaker trip voltage, typically
50mV. V(t
O
) is the voltage drop across the sense resistor
before the short or overcurrent condition occurs. V
i
is the
voltage across the sense resistor when the short current
or overcurrent is applied on it.
Example: A system has a 1A current load and a 0.02
sense resistor is used. An extended delay circuit needs to
be designed for a 50µs delay time after the load jumps to
5A. In this case:
V(t) = 50mV
V(t
O
) = 20mV
V
i
= 5A • 0.02 = 100mV
If we choose R = 100, we will get C = 1µF.
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LT1640ALIS8#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers Hot Swap Controller for -48V
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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