OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LTC3720EGN#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
19
LTC3720
3720f
However, a 0A to 15A load step will cause an output
change of up to:
∆V
OUT(STEP)
= ∆I
LOAD
(ESR) = (15A) (0.005Ω) = 75mV
The complete circuit is shown in Figure 7.
Active Voltage Positioning
Active voltage positioning (also termed load “deregula-
tion” or droop) describes a technique where the output
voltage varies with load in a controlled manner. It is useful
in applications where rapid load steps are the main cause
of error in the output voltage. By positioning the output
voltage above the regulation point at zero load, and below
the regulation point at full load, one can use more of the
APPLICATIO S I FOR ATIO
WUUU
error budget for the load step. This allows one to reduce
the number of output capacitors by relaxing the ESR
requirement.
In the design example, Figure 7, five 0.025Ω capacitors
are required in parallel to keep the output voltage within
tolerance. Using active voltage positioning, the same
specification can be met with only three capacitors. In this
case, the load step will cause an output voltage change of:
∆=
()
Ω
()
=VA mV
OUT STEP()
.15
1
3
0 025 125
Figure 7. 15A CPU Core Voltage Regulator at 300kHz
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
RUN/SS
V
ON
PGOOD
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
SGND
V
FB
V
OSENSE
VID0
VID1
BOOST
TG
SW
SENSE
+
SENSE
–
PGND
BG
INTV
CC
V
IN
EXTV
CC
V
CC
VID4
VID3
VID2
LTC3720
INT V
CC
INT V
CC
V
IN
330k
100k
C
ION
0.01µF
R
C
20k
R
F
10Ω
C
C2
100pF
D
B
CMDSH-3
C
C1
500pF
C
FB
100pF
C2
6.8nF
POWER GOOD
+
V
OUT
1.05V TO 1.825V
15A
V
IN
7V TO 24V
C
OUT
270µF
2V
×5
C
IN
10µF
50V
×3
SGND
3720 F07
C
SS
0.1µF
C
B
0.33µF
C
F
0.1µF
M1
IRF7811A
M2
IRF7811A
×2
4.7µF
6.3V
UPS840
L1
1µH
1Ω
20
LTC3720
3720f
APPLICATIO S I FOR ATIO
WUUU
By positioning the output voltage 60mV above the regula-
tion point at no load, it will only drop 65mV below the
regulation point after the load step, well within the ±100mV
tolerance.
Implementing active voltage positioning requires setting a
precise gain between the sensed current and the output
voltage. Because of the variability of MOSFET on-resis-
tance, it is prudent to use a sense resistor with active
voltage positioning. In order to minimize power lost in this
resistor, a low value is chosen of 0.003Ω. The nominal
sense voltage will now be:
V
SNS(NOM)
= (0.003Ω)(15A) = 45mV
To maintain a reasonable current limit, the voltage on the
V
RNG
pin is reduced to its minimum value of 0.5V, corre-
sponding to a 50mV nominal sense voltage.
Next, the gain of the LTC3720 error amplifier must be
determined. The change in I
TH
voltage for a corresponding
change in the output current is:
∆=
∆
=
()
Ω
()()
=
I
V
V
RI
AV
TH
RNG
SENSE OUT
12
24 0 003 15 1 08..
The corresponding change in the output voltage is deter-
mined by the gain of the error amplifier and feedback
divider. The LTC3720 error amplifier has a transconduc-
tance g
m
that is constant over both temperature and a wide
± 40mV input range. Thus, by connecting a load resis-
tance R
VP
to the I
TH
pin, the error amplifier gain can be
precisely set for accurate active voltage positioning.
∆=
∆IgR
V
V
V
TH m VP
OUT
OUT
08.
Solving for this resistance value:
R
VI
Vg V
VV
VmS mV
k
VP
OUT TH
m OUT
=
∆
∆
==
(. )
(. )(. )
(. )(. )( )
.
08
15 108
08 17 125
953
The gain setting resistance R
VP
is implemented with two
resistors, R
VP1
connected from I
TH
to ground and R
VP2
connected from I
TH
to INTV
CC
. The parallel combination of
these resistors must equal R
VP
and their ratio determines
nominal value of the I
TH
pin voltage when the error
amplifier input is zero. To center the load line around the
regulation point, the I
TH
pin voltage must be set to corre-
spond to half the output current. The relation between I
TH
voltage and the output current is:
I
V
V
RI I V
V
V
AAV
V
TH NOM
RNG
SENSE OUT L()
–.
.
..–..
.
=
∆
+
=
Ω
()
+
=
12 1
2
08
12
05
0 003 7 5
1
2
47 08
117
Solving for the required values of the resistors:
R
V
VI
R
V
VV
k
k
R
V
I
R
V
V
kk
VP
TH NOM
VP
VP
TH NOM
VP
1
2
5
5
5
5117
953
12 44
55
117
953 4073
==
=
===
––.
.
.
.
..
()
()
21
LTC3720
3720f
APPLICATIO S I FOR ATIO
WUUU
Figure 8. 15A CPU Core Voltage Regulator with Active Voltage Positioning at 300kHz
Figure 9. Normal Transient Response (C
OUT
= 5 × 270µF)
V
OUT
100mV/DIV
1.5V
I
L
10A/DIV
C
OUT
= 5 × 270µF20µs/DIV 3720 F09
V
IN
= 15V
FIGURE 7 CIRCUIT
Figure 10. Transient Response with Active
Voltage Positioning (C
OUT
= 3 × 270µF)
V
OUT
100mV/DIV
1.5V
I
L
10A/DIV
C
OUT
= 3 × 270µF20µs/DIV 3720 F10
V
IN
= 15V
FIGURE 8 CIRCUIT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
RUN/SS
V
ON
PGOOD
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
SGND
V
FB
V
OSENSE
VID0
VID1
BOOST
TG
SW
SENSE
+
SENSE
–
PGND
BG
INTV
CC
V
IN
EXTV
CC
V
CC
VID4
VID3
VID2
LTC3720
INT V
CC
INT V
CC
V
IN
330k
100k
C
ION
0.01µF
R
VP2
40.2k
R
VP1
12.4k
C
SS
0.1pF
C
C
180pF
C
B
0.33µF
C
F
0.1µF
POWER GOOD
+
V
OUT
1.05V TO 1.825V
15A
V
IN
5V TO 24V
C
OUT
270µF
2V
×3
C
IN
10µF
35V
×3
SGND
3720 F08
D
B
CMDSH-3
M1
IRF7811A
M2
IRF7811A
×2
4.7µF
6.3V
UPS840
R
SENSE
0.003Ω
R
F
1Ω
C
FB
100pF
R
RNG1
4.99k
R
RNG2
45.3k
L1
1µH
+
The modified circuit is shown in Figure 8. Figures 9 and 10
show the transient response without and with active
voltage positioning. Both circuits easily stay within ±100mV
of the 1.5V output. However, the circuit with active voltage
positioning accomplishes this with only three output ca-
pacitors rather than five. Refer to Linear Technology
Design Solutions 10 for additional information about
active voltage positioning.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

LTC3720EGN#TRPBF

Mfr. #:
Buy LTC3720EGN#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Single-Phase Buck Controller
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet