–6–
OP275 OP275
–7–
INPUT OFFSET VOLTAGE – V
UNITS
200
160
0
–500
–400
500
–300–200
–100
0 100 200
300
400
120
80
40
BASED ON 920 OP AMPS
V
S
=
15V
T
A
= 25
C
TPC 19. Input Offset (V
OS
)
Distribution
DIFFERENTIAL INPUT VOLTAGE – V
40
20
0
0 1.0
35
30
10
5
25
15
SLEW RATE – V/
s
V
S
=
15V
R
L
= 2k
T
A
= 25
C
0.80.60.40.2
TPC 22. Slew Rate vs. Differential
Input Voltage
10
0%
100
90
200ns
5V
TPC 25. Positive Slew Rate
R
L
= 2 k , V
S
= ±15 V, A
V
= +1
SETTLING TIME – ns
STEP SIZE – V
10
8
–10
–2
–4
–6
–8
6
2
4
0
0 100 900
200 300 400 500 600 700 800
+0.1%
+0.01%
–0.1%
–0.01%
TPC 20. Step Size vs. Settling
Time
TEMPERATURE –
C
50
SLEW RATE – V/
s
20
–50 –25 100
0 25 50 75
45
40
35
30
25
–SR
+SR
V
S
=
15V
R
L
= 2k
TPC 23. Slew Rate vs. Temperature
10
0%
100
90
100ns
50mV
TPC 26. Small Signal Response
R
L
= 2 k , V
S
= ±5 V, A
V
= +1
+SR
–SR
CAPACITIVE LOAD – pF
50
45
SLEW RATE – V/s
20
0 100 500200 300 400
40
35
30
25
T
A
=
25
C
V
S
=
15V
TPC 21. Slew Rate vs. Capacitive
Load
10
0%
100
90
200ns
5V
TPC 24. Negative Slew Rate
R
L
= 2 k , V
S
= ±15 V, A
V
= +1
2.5 kHz
0 Hz
CH A: 80.0 V FS
10.0 V/DIV
MKR: 6.23 nV/ Hz
BW: 15.0 MHzMKR: 1 000 Hz
TPC 27. Voltage Noise Density
vs. Frequency V
S
= ±15 V
REV. C REV. C
–6–
OP275 OP275
–7–
APPLICATIONS
Circuit Protection
OP275 has been designed with inherent short-circuit protection
to ground. An internal 30
resistor, in series with the output,
limits the output current at room temperature to I
SC
+ = 40 mA
and I
SC
– = –90 mA, typically, with ±15 V supplies.
However, shorts to either supply may destroy the device when
excessive voltages or currents are applied. If it is possible for a
user to short an output to a supply for safe operation, the output
current of the OP275 should be design-limited to ±30 mA, as
shown in Figure 1.
Total Harmonic Distortion
Total Harmonic Distortion + Noise (THD + N) of the OP275 is
well below 0.001% with any load down to 600
. However, this is
dependent upon the peak output swing. In Figure 2, the THD +
Noise with 3 V rms output is below 0.001%. In Figure 3, THD +
Noise is below 0.001% for the 10 k
and 2 k
loads but increases
to above 0.1% for the 600
load condition. This is a result of the
output swing capability of the OP275. Notice the results in Figure 4,
showing THD versus V
IN
(V rms). Thisgure shows that the THD
+ Noise remains very low until the output reaches 9.5 V rms. This
performance is similar to competitive products.
R
FB
FEEDBAC
K
R
X
332
A1
V
OUT
A1 = 1/2 OP275
+
Figure 1. Recommended Output Short-Circuit Protection
R
L
= 600
, 2k
, 10k
V
S
=
15V
V
IN
= 3V rms
A
V
= +1
0.010
0.001
0.0005
20 100 1k 10k 20
k
FREQUENCY – Hz
THD + NOISE – %
Figure 2. THD + Noise vs. Frequency vs. R
LOAD
1
0.001
0.0001
20 100 1k 10k 20
k
THD + NOISE – %
FREQUENCY – Hz
A
V
= +1
V
S
= 18V
V
IN
= 10V rms
80kHz FILTER
600
2k
10k
0.1
0.010
Figure 3. THD + Noise vs. R
LOAD
; V
IN
=10 V rms
V
S
= 18V
R
L
= 600
0.010
0.001
0.0001
0.5 1 10
THD + NOISE – %
OUTPUT SWING – V rms
Figure 4. Headroom, THD + Noise vs. Output
Amplitude (V rms); R
LOAD
= 600 , V
SUP
= ±18 V
The output of the OP275 is designed to maintain low harmonic
distortion while driving 600
loads. However, driving 600
loads with very high output swings results in higher distortion if
clipping occurs. A common example of this is in attempting to
drive 10 V rms into any load with ±15 V supplies. Clipping will
occur and distortion will be very high. To attain low harmonic
distortion with large output swings, supply voltages may be
increased. Figure 5 shows the performance of the OP275 driving
600
loads with supply voltages varying from ±18 V to ±20 V.
Notice that with ±18 V supplies the distortion is fairly high, while
with ±20 V supplies it is a very low 0.0007%.
SUPPLY VOLTAGE – V
0.0001
0.001
THD – %
0
17
22
18
19
20
21
0.01
0.1
R
L
= 600
V
OUT
= 10V rms @ 1kHz
Figure 5. THD + Noise vs. Supply Voltage
Noise
The voltage noise density of the OP275 is below 7 nV/
Hz from
30 Hz. This enables low noise designs to have good performance
throughout the full audio range. Figure 6 shows a typical OP275
with a 1/f corner at 2.24 Hz.
10Hz
0Hz
CH A: 80.0
V FS 10.0
V/DIV
MKR: 45.6
V/ Hz
BW: 0.145HzMKR: 2.24Hz
Figure 6. 1/f Noise Corner, V
S
= ±15 V, A
V
= 1000
REV. C REV. C
OP275
–8–
OP275
–9–
Noise Testing
For audio applications, the noise density is usually the most
important noise parameter. For characterization, the OP275 is
tested using an Audio Precision, System One. The input signal
to the Audio Precision must be amplied enough to measure it
accurately. For the OP275, the noise is gained by approximately
1020 using the circuit shown in Figure 7. Any readings on the
Audio Precision must then be divided by the gain. In imple-
menting this test xture, good supply bypassing is essential.
A
B
OP275
909
100
OP37
909
100
909
100
OP37
4.42k
490
OUTPUT
Figure 7. Noise Test Fixture
Input Overcurrent Protection
The maximum input differential voltage that can be applied
to the OP275 is determined by a pair of internal Zener diodes
connected across its inputs. They limit the maximum differential
input voltage to ±7.5 V. This is to prevent emitter-base junction
breakdown from occurring in the input stage of the OP275 when
very large differential voltages are applied. However, to preserve
the OP275’s low input noise voltage, internal resistances in series
with the inputs were not used to limit the current in the clamp
diodes. In small signal applications, this is not an issue; however,
in applications where large differential voltages can be inadvert-
ently applied to the device, large transient currents canow
through these diodes. Although these diodes have been designed
to carry a current of ±5 mA, external resistors as shown in Figure 8
should be used in the event that the OP275’s differential voltage
were to exceed ±7.5 V.
OP275
1.4k
1.4k
+
2
3
6
Figure 8. Input Overcurrent Protection
Output Voltage Phase Reversal
Since the OP275’s input stage combines bipolar transistors for
low noise and p-channel JFETs for high speed performance, the
output voltage of the OP275 may exhibit phase reversal if either
of its inputs exceeds its negative common-mode input voltage.
This might occur in very severe industrial applications where
a sensor or system fault might apply very large voltages on the
inputs of the OP275. Even though the input voltage range of the
OP275 is ±10.5 V, an input voltage of approximately –13.5 V will
cause output voltage phase reversal. In inverting amplier con-
gurations, the OP275’s internal 7.5 V input clamping diodes will
prevent phase reversal; however, they will not prevent this effect
from occurring in noninverting applications. For these applications,
the x is a simple one and is illustrated in Figure 9. A 3.92 k
resistor in series with the noninverting input of the OP275 cures
the problem.
R
FB
*
V
IN
R
S
3.92k
V
OUT
R
L
2k
*
R
FB
IS OPTIONAL
+
Figure 9. Output Voltage Phase Reversal Fix
Overload or Overdrive Recovery
Overload or overdrive recovery time of an operational amplier
is the time required for the output voltage to recover to a rated
output voltage from a saturated condition. This recovery time
is important in applications where the amplier must recover
quickly after a large abnormal transient event. The circuit shown
in Figure 10 was used to evaluate the OP275’s overload recovery
time. The OP275 takes approximately 1.2 ms to recover to V
OUT
=
+10 V and approximately 1.5 µs to recover to V
OUT
= –10 V.
V
IN
V
OUT
R
L
2.43k
A1 = 1/2 OP275
R2
10k
R1
1k
4V p-p
@100Hz
1
2
3
A1
R
S
909k
+
Figure 10. Overload Recovery Time Test Circuit
Measuring Settling Time
The design of OP275 combines a high slew rate and a wide gain
bandwidth product to produce a fast settling (t
S
< 1 µs) amplier
for 8- and 12-bit applications. The test circuit designed to mea-
sure the settling time of the OP275 is shown in Figure 11. This
test method has advantages over false-sum node techniques in
that the actual output of the amplier is measured, instead of an
error voltage at the sum node. Common-mode settling effects are
exercised in this circuit in addition to the slew rate and band-
width effects measured by the false-sum node method. Of course,
a reasonably at-top pulse is required as the stimulus.
The output waveform of the OP275 under test is clamped by
Schottky diodes and buffered by the JFET source follower.
The signal is amplied by a factor of 10 by the OP260 and
then Schottky-clamped at the output to prevent overloading the
oscilloscope’s input amplier. The OP41 is congured as a fast
integrator, which provides overall dc offset nulling.
High Speed Operation
As with most high speed ampliers, care should be taken with
supply decoupling, lead dress, and component placement.
Recommended circuit congurations for inverting and nonin-
verting applications are shown in Figures 12 and 13.
REV. C
REV. C

OP275GPZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Audio Amplifiers Bipolar/JFET Audio Dual 1mV 2nA
Lifecycle:
New from this manufacturer.
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