Le7942B Data Sheet
16
Zarlink Semiconductor Inc.
TEST CIRCUITS (continued)
1/ωC << 90
E. Single-Frequency Noise
SLIC
B(RING)
A(TIP)
68
68
56
C
C
V
N
IDC
S
M
R
L
R
L
R
E
S
E
A(TIP)
B(RING)
Current Feed or Ground Key
F. Ground-Key Detection Center Point Test
V
CC
6.2 k
15 pF
E1
A(TIP)
B(RING)
G. Loop-Detector Switching
R
L
= 600
H. Ground-Key Switching
R
G
DET
R
G
: 2 k at V
BAT
= –48 V
1 k at V
BAT
= –24 V
A(TIP)
B(RING)
Le7942B Data Sheet
17
Zarlink Semiconductor Inc.
PHYSICAL DIMENSIONS
32-Pin PLCC
NOTES:
1 Dimensioning and tolerancing conform to ASME Y14,5M-1994.
2 To be measured at seating plan - C - contact point.
3 Dimensions “D1” and “E1” do not include mold protrusion.
Allowable mold protrusion is 0.010 inch per side. Dimensions
“D” and “E” include mold mismatch and determined at the
parting line; that is “D1” and “E1” are measured at the extreme
material condition at the upper or lower parting line.
4 Exact shape of this feature is optional.
5 Details of pin 1 identifier are optional but must be located
within the zone indicated.
6 Sum of DAM bar protrusions to be 0.007 max per lead.
7 Controlling dimension : Inch.
8 Reference document : JEDEC MS-016
32-Pin PLCC
JEDEC # MS-016
S
y
mbol
Min Nom Max
A 0.125 -- 0.140
A1 0.075 0.090 0.095
D 0.485 0.490 0.495
D1 0.447 0.450 0.453
D2
E 0.585 0.590 0.595
E1 0.547 0.550 0.553
E2
Ԧ 0 deg -- 10 deg
32-Pin PLCC
0.205 REF
0.255 REF
Note:
Packages may have mold tooling markings on the surface. These markings have no impact on the form, fit or function of the
device. Markings will vary with the mold tool used in manufacturing.
Le7942B Data Sheet
18
Zarlink Semiconductor Inc.
REVISION HISTORY
Revision A1 to B1
Page 12, modified ZRX equation.
Revision B1 to C1
Page 8, Line characteristics, OHT State, V
BAT
= –24 V, R
LDC
= 600 to R
LDC
= 300 Ω.
Page 8, Power Dissipation, Off-hook OHT state R
L
= 50 Ω, V
BAT
= –24 V, w/o switching reg., max 800mW to 950mW.
Revision C1 to D1
Page 8, Line characteristics, I
L
LIM (I
Tip
and I
Ring
), changed Max value from 105 to 120.
Revision D1 to E1
Added green package OPN
Added Package Assembly section
Revision E1 to E2
Enhanced format of package drawing in Physical Dimensions section
Added new headers/footers due to Zarlink purchase of Legerity on August 3, 2007

LE7942B-1DJC

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Telecom Interface ICs 1CH, SLIC, P RV, PL32, RoHS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union