Le7942B Data Sheet
7
Zarlink Semiconductor Inc.
Gain tracking
0°C to +70°C
+7 dBm to –55 dBm
Reference: –0 dBm
all –0.10 +0.10
dB
–40°C to +85°C
+7 dBm to –55 dBm
Reference: –0 dBm
all –0.15 +0.15 4
Insertion Loss and Balance Return Signal (2- to 4-Wire and 4- to 4-Wire, See Test Circuits A and B)
BAT = –48 V, R
LDC
= R
LAC
= 600 ; BAT = –24 V, R
LDC
= 300 , R
LAC
= 600
Gain accuracy
0 dBm, 1 kHz
0°C to +70°C
–1
–2
–6.17
–6.17
–6.12
–6.02
–5.87
–5.87
–5.92
dB
3
3
3
0 dBm, 1 kHz
–40°C to +85°C
–1
–2
–6.22
–6.22
–6.17
–6.02
–5.82
–5.82
–5.87
3, 4
3, 4
3, 4
Variation with frequency
300 Hz to 3400 Hz
Relative to 1 kHz
0°C to +70°C
all –0.10 +0.10 3
300 Hz to 3400 Hz
Relative to 1 kHz
–40°C to +85°C
all –0.15 +0.15 3, 4
Gain tracking
0°C to +70°C
+3 dBm to –55 dBm
Reference: 0 dBm
all –0.10 +0.10 3
–40°C to +85°C
+3 dBm to –55 dBm
Reference: 0 dBm
all –0.15 –0.15 3, 4
Group delay f = 1 kHz all 5.3 µs4, 12
Total Harmonic Distortion (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B)
BAT = –48 V, R
LDC
= R
LAC
= 600
Harmonic distortion 0 dBm all –64 –50
dB
300 Hz to 3400 Hz +7 dBm all –55 40 6
Idle Channel Noise
BAT = –48 V, R
LDC
= R
LAC
= 600 ; BAT = –24 V, R
LDC
= 300 , R
LAC
= 600
C-message weighted noise
2-wire, 0°C to +70°C
2-wire, –40°C to +85°C
all
+7 +10
+12
dBmc
4
4
Psophometric weighted noise
2-wire, 0°C to +70°C
2-wire, –40°C to +85°C
all
–83 –80
–78
dBmp
4
Single Frequency Out-of-Band Noise (See Test Circuit E)
Metallic 4 kHz to 9 kHz
9 kHz to 1 MHz
256 kHz and harmonics**
all
–76
–76
–63
dBm
4
4, 5, 8
4, 5
Longitudinal 1 kHz to 15 kHz
Above 15 kHz
256 kHz and harmonics**
all
–70
–85
–57
4
4, 5, 8
4, 5
Note:
**Applies only when switching regulator is used.
ELECTRICAL CHARACTERISTICS (continued)
Description Test Conditions (See Note 1) Grade Min Typ Max Unit Note
Le7942B Data Sheet
8
Zarlink Semiconductor Inc.
Line Characteristics (See Figures 1a, 1b, 1c)
Short loops, Active state V
BAT
= –24 V, R
LDC
= 300
V
BAT
= –43 V, R
LDC
= 600
V
BAT
= –48 V, R
LDC
= 600
all 31.8 34.4 37.0
mA
4, 9
4
Long loops, Active state V
BAT
= –24 V, R
LDC
= 640
V
BAT
= –43 V, R
LDC
= 1300
V
BAT
= –48 V, R
LDC
= 1900
all
20.0
23.0
18.0
4, 9
4
OHT state V
BAT
= –24 V, R
LDC
= 300
V
BAT
= –48 V, R
LDC
= 600
all 31.4 34.4 37.4
4, 9
Loop current Tip Open state, R
L
= 0
Disconnect state, R
L
= 0
all 1.0
I
L
LIM (I
Tip
and I
Ring
) Tip and ring shorted to GND all 70 120
Power Dissipation Battery, Normal Loop Polarity
On-hook Open Circuit state V
BAT
= –24 V, w/o switching reg.
V
BAT
= –48 V, with switching reg.
all
30
35
75
100
mW
9
On-hook OHT state V
BAT
= –24 V, w/o switching reg.
V
BAT
= –48 V, with switching reg.
all
80
130
225
9
On-hook Active state V
BAT
= –24 V, w/o switching reg.
V
BAT
= –48 V, with switching reg.
all
80
130
225
300
9
Off-hook OHT state
R
L
= 50
V
BAT
= –24 V, w/o switching reg.
V
BAT
= –48 V, with switching reg.
all
500
400
950
750
9
Off-hook Active state
R
L
= 50
V
BAT
= –24 V, w/o switching reg.
V
BAT
= –48 V, with switching reg.
all
800
450
1100
1000
9
Supply Currents, Battery = –24 V or –48 V
V
CC
on-hook supply current Open Circuit state
OHT state
Active state
all
2.5
4.5
4.5
4.5
10.0
12.0
mA 9
V
BREF
on-hook supply current Open Circuit state
OHT state
Active state
all
0
0
0
V
BAT
on-hook supply current Open Circuit state
OHT state
Active state
all
0.6
2.3
2.3
1.0
5.0
6.0
Power Supply Rejection Ratio (V
RIPPLE
= 50 mVrms)
V
CC
50 Hz to 3.4 kHz
3.4 kHz to 50 kHz
all
25
22
45
35
dB 6
V
BAT
50 Hz to 3.4 kHz
3.4 kHz to 50 kHz
all
27
20
45
40
Effective int. resistance CAS to GND all 85 170 255 k 4
Off-Hook Detector
Current threshold
I
DET
= 365/R
D
If R
D
to gnd
I
DET
= 1825/R
D
If R
D
to –5V
all –20 +20 %
ELECTRICAL CHARACTERISTICS (continued)
Description Test Conditions (See Note 1) Grade Min Typ Max Unit Note
Le7942B Data Sheet
9
Zarlink Semiconductor Inc.
Ground-Key Detector Thresholds, Active State
Ground-key resistance
threshold
V
BAT
= –24 V, B(RING) to GND
V
BAT
= –48 V, B(RING) to GND
all
1.0
2.0
2.2
5.0
4.5
10.0
k
9
Ground-key current threshold B(RING) to GND
Midpoint to GND
all
9
9
mA 7
Effective internal resistance GKFIL to AGND/DGND all 18 36 54 k 4
Ring-Trip Detector Input
Bias current all –5 –0.05 µA
Offset voltage Source resistance = 0 to 2 M all –50 0 +50 mV 11
Logic Inputs (C4–C1, E1, and CHCLK)
Input High voltage all 2.0
V
Input Low voltage all 0.8
Input High current All inputs except E1 all –75 40
µA
Input High current Input E1 all –75 45
Input Low current all –0.4 mA
Logic Output (DET
)
Output Low voltage I
OUT
= 0.3 mA all 0.4
V
Output High voltage I
OUT
= –0.1 mA all 2.4
Relay Driver Outputs (RINGOUT, TESTOUT)
On voltage 25 mA sink all 0.3 +1.5 V
Off leakage V
OH
= 5 V all 100 µA
Zener break-over I
L
= 100 µA all 6 7.2
V
Zener on voltage I
L
= 30 mA all 8
ELECTRICAL CHARACTERISTICS (continued)
Description Test Conditions (See Note 1) Grade Min Typ Max Unit Note

LE7942B-1DJC

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Telecom Interface ICs 1CH, SLIC, P RV, PL32, RoHS
Lifecycle:
New from this manufacturer.
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