Safety Timer
The charger has a safety timer that controls the maxi-
mum length of time for a charge cycle. It is user selec-
table from 1 to 10 hours. If this timer expires and the
battery has failed to reach the termination current, the
charger enters the fault state and is latched off.
Charging does not continue until either power is cycled
or the ENC pin is strobed low and then high again. The
timer does not start until CC mode is entered and con-
tinues through CV mode. Precharge mode is not includ-
ed in the STMR.
Timing Equation:
0.1647 x R
STMR
= t (in seconds); R
STMR
= R1 + R2
Where R1 is the resistor from MARGIN to ground and
R2 is the resistor from STMR to MARGIN.
Thermistor Input
Battery temperature can be monitored using an exter-
nal thermistor. The THM input goes to a comparator
and is pulled up internally by a 10k resistor. The volt-
age on this pin must be above V
HYS-HOT
and below
V
HYS-COLD
in order to start charging. Thermistor func-
tionality can be disabled by grounding the THM pin
and charging is independent of temperature. During
charging, if the voltage on the THM pin goes below
V
HOT
volts, the charger pauses until the voltage rises
above V
HYS-HOT
volts. Also, if the voltage on the THM
pin goes above V
COLD
volts, the charger pauses until
the voltage falls below V
HYS-COLD
volts. All timers
pause while charging is interrupted and resume when
the temperature returns to the valid range. The charger
enters the fault state when an overtemperature or
undertemperature condition occurs. A 10k NTC ther-
mistor is recommended for this pin.
Charge Status Indicators
The CHARGE, FAULT, and DONE pins can be used as
digital discretes or as LED drivers; they are open drain.
When charging, the CHARGE pin is held low. When the
charger detects a full battery/termination condition,
I
TERMINATE
, the DONE pin goes low and the CHARGE
pin goes high impedance. Any charging fault (overtem-
perature or expiration of the safety timer) causes the
FAULT pin to flash at a 4Hz rate and the CHARGE and
DONE pins go high impedance. The FAULT pin stays
on solid, not flash, if the fault occurs in CV mode.
DS2731
Cache-Memory Battery-Backup Management IC
______________________________________________________________________________________ 13
Table 1. Thermistor Threshold
TEMPERATURE (°C)
THM THRESHOLD RATIO OF C
BIAS
THERMISTOR
RESISTANCE
(k)
SEMITEC 103AT-2
FENWAL
197-103LAG-A01
173-103LAF-301
COLD 0.739 27.040 0 4
HOT 0.283 4.925 45 42
DISABLE 0.030 — — —
Table 2. Charge Status Indicator Description
CONDITION CHARGE PIN DONE PIN FAULT PIN COMMENT
Precharge Low High-Z High-Z
Battery Charged High-Z Low High-Z (Done)
Fault High-Z High-Z Blinking
50% DF, 4Hz rate; low if
fault occurs during CV
mode.
Charger Disabled High-Z High-Z High-Z
DS2731
Cache-Memory Battery-Backup
Buck-Regulator Supply
(2MHz PWM)
A 2MHz internal synchronous buck regulator is used to
generate the appropriate cache-memory supply volt-
age. With careful inductor selection, high efficiencies
can be achieved with this type of supply (see Figures
7a and 7b). The regulator has a user-selectable voltage
range of 0.9V to 2.5V, and can supply up to 450mA.
There is also a user-selectable LO_BATT threshold with
a range of 2.5V to 3V. If the battery voltage drops
below this threshold, the regulator shuts down and the
IC goes into a low-power state until system power is
restored. The regulator can be disabled by the ENS pin
during normal power conditions. The buck regulator is
designed to supply enough current to power the cache
memory during data retention/refresh mode. The regu-
lator can be enabled during normal system power, but
it cannot supply power to the cache memory during
normal operating conditions.
Note: The buck regulator and the charger should not
run simultaneously.
Cache-Memory Battery-Backup Management IC
14 ______________________________________________________________________________________
V
THM
TIME
V
COLD
V
HYS-COLD
V
HOT-HYS
THERMISTOR
FUNCTIONALLY
DISABLED
NOTE: THIS GRAPH IS NOT MEANT TO REPRESENT A LOGICAL PROGRESSION OF TEMPERATURE OVER TIME BUT RATHER THE VOLTAGE THRESHOLDS
AT WHICH CHARGING IS DISABLED.
CHARGING ENABLED CHARGING DISABLED
V
ENABLE
V
DISABLE
V
HOT
Figure 6. Temperature Operation
Buck-Regulator Operation
Overview
VREG is the feedback pin for the 2MHz PWM switching
regulator cache-memory supply. The switching node
uses this voltage reference feedback to regulate the
output voltage to the value specified by DIV. The
switching power-supply high-side and low-side FETs
drive LX. The output inductor is connected to this node.
During normal operation, the switching frequency
observed on the LX pin is approximately 2MHz. The
exact switching frequency and duty factor varies based
on load and inductor selection. The SGND pin con-
nects to the source of the internal low-side switch. This
pin should be routed from the DS2731 to the negative
terminal of the output capacitor. There are fast transient
currents in this connection caused by the commutation
of the body-drain diode of the low-side switch when the
high-side switch turns on. Considerations should be
taken during layout to minimize EMI. The buck regulator
is equipped with an internal temperature-shutdown cir-
cuit that turns off the regulator if the circuit temperature
reaches 165°C. Regulation resumes once the tempera-
ture has cooled 15°C below 165°C.
DS2731
Cache-Memory Battery-Backup Management IC
______________________________________________________________________________________ 15
MEMORY BUCK EFFICIENCY
86.5
10 30 50 70 90 110 130 150 170 190 210 230 250
87.0
87.5
88.0
88.5
89.0
89.5
90.0
90.5
91.0
91.5
92.0
LOAD (mA)
% EFFICIENCY
NOTE: THE INDUCTOR USED FOR EFFICIENCY MEASUREMENT WAS 2.2µH ±20%. CURRENT RATING: 250mA for 30% INDUCTANCE DROOP AND 260mA FOR WIRE
CSA LIMIT OF 300 CIRCULAR MILS PER AMP.
Figure 7a. Memory Buck Regulator Efficiency with 2.2µH Inductor

DS2731E+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Battery Management Cache-Memory Battery-Backup
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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