DS2731
Setting Memory Voltage
and Low-Battery Shutdown
The cache-memory and low-battery shutdown voltages
are set using a 1.25V reference and resistor-divider.
The 1.25V reference is supplied at the REF pin. This pin
cannot supply power for any system loads. In order to
ensure that the voltage reference is not overloaded, a
1M total resistor-divider network is recommended.
Memory Voltage
The voltage on the DIV pin is the average DC voltage
set point to which the cache-memory supply regulates.
The cache-memory supply voltage can range from 0.9V
to 2.5V and is set by the following formula:
V
DIV
x 25/12 = V
VREG
Low-Battery Shutdown
The voltage on the LO_BATT pin is compared to the
prescaled battery voltage. The scale factor is 4.5:1.
When the scaled battery voltage drops below the volt-
age on LO_BATT, the IC goes into quiescent-power
mode. All circuitry is shut off and does not turn on
again until the V
BIAS
voltage is stable and UVLO-REG
is off. The low-battery voltage set point can be deter-
mined by the following formula:
V
LO_BATT
x 4.5 = Low-Battery Voltage Set Point
Cache-Memory Battery-Backup Management IC
16 ______________________________________________________________________________________
LINE REGULATION vs. V
BATT
AT LOADS
1.72
1.73
1.74
1.75
1.76
1.77
1.78
1.79
2.8 3.6 4.2
V
BATT
(V)
V
MEM
(V)
20mA 250mA
Figure 7b. Memory Buck Regulator Line Regulation vs. Battery
Voltage at Loads
I
OCLP
I
OCDC
I
OCLN
P
ON
N
ON
P
ON
N
ON
P
ON
N
ON
P
ON
N
ON
Figure 8. Buck Regulator Overcurrent Switching
Layout
Due to high-frequency switching, high-current loops,
and large-voltage switching, special consideration
should be taken for layout of the DS2731 board in order
to reduce EMI.
CCCV Charger
The CCCV charger generates a high-current loop from
VIN to CHG1 and CHG2 to CGND1 and CGND2. Also,
large dV/dT is generated at CHG1 and CHG2 from the
switching on and off of the 12V supply. These combine
to generate magnetic and electric fields. To reduce
these fields, the high-current loop should be made as
small as possible. Traces should be routed point-to-
point, as straight as possible, and a ground plane/shield
should be used to isolate the noise from nearby compo-
nents. Also, the trace width of the charge path should
be sufficiently large enough to accommodate the high
current. SNS and BATT+ should be connected as close
as possible to the SNS resistor and BATT+ terminal for
accurate current regulation and battery voltage mea-
surements.
The AGND pin is the analog reference connection. No
charge current flows into AGND. It should be connect-
ed as close as possible to the negative terminal of the
battery. This allows for a more accurate battery voltage
measurement by avoiding any voltage drops caused
by stray resistance in the high-current charge path.
Cache-Memory Buck Regulator
Even though the voltages and currents are not as high
as the CCCV charger, care still needs to be taken dur-
ing layout of the memory buck regulator. There are fast-
transient voltages at LX. The fast-transient current loop
is from CIN to LX to SGND. Again, the current loop
should be routed as small as possible and ground
shielding should be used to isolate the circuit.
Power-Failure Switchover
During a power-failure event, the DS2731 can assume
responsibility for supplying power to the cache memory
using the backup battery. As long as the 2MHz internal
synchronous buck regulator is enabled and the battery
voltage is above LO_BATT, the buck regulator supplies
power to the memory. During normal power the buck
regulator runs off of the aux input voltage. The DS2731
monitors the aux input voltage for power failure. During
a power-failure event, the DS2731 internally switches
the buck-regulator supply to the battery backup. The
battery is connected internally by a break-before-make
switching mux. The break-before-make circuitry
ensures that the battery is never connected to the 3.3V
aux supply. The capacitor on the CIN pin provides
power to the IC during switchover. If the buck regulator
is disabled during normal power conditions, ENS must
be driven low by the system when a loss of power is
detected.
Auxiliary Voltage
The aux switch monitors the aux power supply. In the
system, this supply fails before the cache-memory
power supply. When it crosses 2.93V, a comparator in
the DS2731 activates the power multiplexer and switch-
es the power source for the buck regulator from the aux
power to the battery. This occurs as a break-before-
make operation to prevent current from flowing out of
the battery into the aux supply.
Bypass/Holdup Capacitor
The bypass/holdup capacitor, connected to pin CIN, is
sized to be able to support full input current to the switch-
er in the case where the ENS pin is low when the aux volt-
age falls below 2.93V. Since the power mux is
break-before-make, the capacitor supplies power during
the handover operation. Prior to the event, the capacitor
is charged to 2.93V, and immediately afterwards it is con-
nected to the battery voltage through the 1 mux switch.
If power is restored, the conduction path between the
battery and holdup capacitor is opened before the
capacitor is connected to the 3.3V aux supply.
Enable Switcher
The buck regulator is enabled by the ENS pin. If the pin
is low, the regulator turns on supplying power to the
cache memory. The ENS pin should be driven low by
the system when the cache memory has halted active
processing and is in its data-retention/refresh mode.
DS2731
Cache-Memory Battery-Backup Management IC
______________________________________________________________________________________ 17
DS2731
Cache-Memory Battery-Backup Management IC
18 ______________________________________________________________________________________
Actions Occurring During Time Intervals
From T1 to T2: At T1, the power-failure signal occurs
and the system must put the cache
memory into its self-refresh mode.
Then it must shut off the system cache
supply. Between the time the system
power supply is shut off and the ENS
pin is driven low, the cache memory is
powered from its local bypass capaci-
tance.
From T2 to T3: When the ENS pin goes low, the
DS2731 buck regulator turns on and
takes over regulation of the cache-
memory voltage. The power source for
the DS2731’s switcher during this
interval is the 3.3V aux voltage.
From T3 to T4: At time T3, the DS2731 detects that
the 3.3V aux supply is about to fail and
activates the multiplexer. However, to
prevent cross-connections between
the 3.3V aux and the battery, the multi-
plexer is designed as break-before-
make. The interval T3–T4 is t
BRK
.
During this interval the DS2731 switch-
ing supply uses the holdup capacitor
on CIN as its power source. CIN must
be sized so that it has enough capaci-
ty to hold up the regulator for t
BRK
.
After T4: At T4, the multiplexer connects CIN to
the battery’s positive terminal. The reg-
ulator operates from the battery.
10V
12V
DETECT POWER FAILURE
DETECT 3.3V FAILURE
3.3V
ENS
T1
2.93V
VOLTAGEVOLTAGE
T3 T4 TIMET2
Figure 9. Expected Scenario for Multiplex Switchover from Aux to Battery

DS2731E+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Battery Management Cache-Memory Battery-Backup
Lifecycle:
New from this manufacturer.
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