xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx
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LPC2292_2294 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 June 2011 7 of 54
NXP Semiconductors
LPC2292/2294
16/32-bit ARM microcontrollers with external memory interface
L P0[29]/
AIN2/
CAP0[3]/
MAT0[3]
P0[30]/
AIN3/
EINT3/
CAP0[0]
P1[16]/
TRACE
PKT0
P0[0]/
TXD0/
PWM1
P3[19]/
A19
P0[2]/
SCL/
CAP0[0]
P3[15]/
A15
P0[4]/
SCK0/
CAP0[1]
P3[12]/
A12
V
SS
P1[24]/
TRACE
CLK
P0[8]/
TXD1/
PWM4
P0[9]/
RXD1/
PWM6/
EINT3
M P3[25]/
CS2
P3[24]/
CS3
V
DD(3V3)
P1[31]/
TRST
P3[18]/
A18
V
DD(3V3)
P3[16]/
A16
P0[3]/
SDA/
MAT0[0]/
EINT1
P3[13]/
A13
P3[9]/A9 P0[7]/
SSEL0/
PWM2/
EINT2
P3[7]/A7 P3[5]/A5
NV
DD(1V8)
V
SS
P3[23]/
A23/
XCLK
P3[21]/
A21
P3[17]/
A17
P1[26]/
RTCK
V
SS
V
DD(3V3)
P0[5]/
MISO0/
MAT0[1]
P3[10]/
A10
P0[6]/
MOSI0/
CAP0[2]
P3[8]/A8 P3[6]/A6
Table 3. Ball allocation
…continued
Row Column
1 2 3 4 5 6 7 8 9 10 11 12 13
LPC2292_2294 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 June 2011 8 of 54
NXP Semiconductors
LPC2292/2294
16/32-bit ARM microcontrollers with external memory interface
5.2 Pin description
Table 4. Pin description
Symbol Pin (LQFP) Pin
(TFBGA)
[1]
Type Description
P0[0] to P0[31] I/O Port 0: Port 0 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 0 pins
depends upon the pin function selected via the Pin Connect
Block.
Pins 26 and 31 of port 0 are not available.
P0[0]/TXD0/
PWM1
42
[2]
L4
[2]
O TXD0 — Transmitter output for UART0.
O PWM1 — Pulse Width Modulator output 1.
P0[1]/RXD0/
PWM3/EINT0
49
[4]
K6
[4]
I RXD0 — Receiver input for UART0.
O PWM3 — Pulse Width Modulator output 3.
I EINT0 — External interrupt 0 input
P0[2]/SCL/
CAP0[0]
50
[5]
L6
[5]
I/O SCL — I
2
C-bus clock input/output. Open-drain output (for
I
2
C-bus compliance).
I CAP0[0] — Capture input for Timer 0, channel 0.
P0[3]/SDA/
MAT0[0]/EINT1
58
[5]
M8
[5]
I/O SDA — I
2
C-bus data input/output. Open-drain output (for
I
2
C-bus compliance).
O MAT0[0] — Match output for Timer 0, channel 0.
I EINT1 — External interrupt 1 input.
P0[4]/SCK0/
CAP0[1]
59
[2]
L8
[2]
I/O SCK0 — Serial clock for SPI0. SPI clock output from master
or input to slave.
I CAP0[1] — Capture input for Timer 0, channel 1.
P0[5]/MISO0/
MAT0[1]
61
[2]
N9
[2]
I/O MISO0 — Master In Slave OUT for SPI0. Data input to SPI
master or data output from SPI slave.
O MAT0[1] — Match output for Timer 0, channel 1.
P0[6]/MOSI0/
CAP0[2]
68
[2]
N11
[2]
I/O MOSI0 — Master Out Slave In for SPI0. Data output from SPI
master or data input to SPI slave.
I CAP0[2] — Capture input for Timer 0, channel 2.
P0[7]/SSEL0/
PWM2/EINT2
69
[4]
M11
[4]
I SSEL0 — Slave Select for SPI0. Selects the SPI interface as
a slave.
O PWM2 — Pulse Width Modulator output 2.
I EINT2 — External interrupt 2 input.
P0[8]/TXD1/
PWM4
75
[2]
L12
[2]
O TXD1 — Transmitter output for UART1.
O PWM4 — Pulse Width Modulator output 4.
P0[9]/RXD1/
PWM6/EINT3
76
[4]
L13
[4]
I RXD1 — Receiver input for UART1.
O PWM6 — Pulse Width Modulator output 6.
I EINT3 — External interrupt 3 input.
P0[10]/RTS1/
CAP1[0]
78
[2]
K11
[2]
O RTS1 — Request to Send output for UART1.
I CAP1[0] — Capture input for Timer 1, channel 0.
P0[11]/CTS1/
CAP1[1]
83
[2]
J12
[2]
I CTS1 — Clear to Send input for UART1.
I CAP1[1] — Capture input for Timer 1, channel 1.
LPC2292_2294 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 June 2011 9 of 54
NXP Semiconductors
LPC2292/2294
16/32-bit ARM microcontrollers with external memory interface
P0[12]/DSR1/
MAT1[0]/RD4
84
[2]
J13
[2]
I DSR1 — Data Set Ready input for UART1.
O MAT1[0] — Match output for Timer 1, channel 0.
I RD4 — CAN4 receiver input (LPC2294 only).
P0[13]/DTR1/
MAT1[1]/TD4
85
[2]
H10
[2]
O DTR1 — Data Terminal Ready output for UART1.
O MAT1[1] — Match output for Timer 1, channel 1.
O TD4 — CAN4 transmitter output (LPC2294 only).
P0[14]/DCD1/
EINT1
92
[4]
G10
[4]
I DCD1 — Data Carrier Detect input for UART1.
I EINT1 — External interrupt 1 input.
Note: LOW on this pin while RESET
is LOW forces on-chip
bootloader to take over control of the part after reset.
P0[15]/RI1/
EINT2
99
[4]
E11
[4]
I RI1 — Ring Indicator input for UART1.
I EINT2 — External interrupt 2 input.
P0[16]/EINT0/
MAT0[2]/
CAP0[2]
100
[4]
E10
[4]
I EINT0 — External interrupt 0 input.
O MAT0[2] — Match output for Timer 0, channel 2.
I CAP0[2] — Capture input for Timer 0, channel 2.
P0[17]/CAP1[2]/
SCK1/MAT1[2]
101
[2]
D13
[2]
I CAP1[2] — Capture input for Timer 1, channel 2.
I/O SCK1 — Serial Clock for SPI1/SSP
[3]
. SPI clock output from
master or input to slave.
O MAT1[2] — Match output for Timer 1, channel 2.
P0[18]/CAP1[3]/
MISO1/MAT1[3]
121
[2]
D8
[2]
I CAP1[3] — Capture input for Timer 1, channel 3.
I/O MISO1 — Master In Slave Out for SPI1/SSP
[3]
. Data input to
SPI master or data output from SPI slave.
O MAT1[3] — Match output for Timer 1, channel 3.
P0[19]/MAT1[2]/
MOSI1/CAP1[2]
122
[2]
C8
[2]
O MAT1[2] — Match output for Timer 1, channel 2.
I/O MOSI1 — Master Out Slave In for SPI1/SSP
[3]
. Data output
from SPI master or data input to SPI slave.
I CAP1[2] — Capture input for Timer 1, channel 2.
P0[20]/MAT1[3]/
SSEL1/EINT3
123
[4]
B8
[4]
O MAT1[3] — Match output for Timer 1, channel 3.
I SSEL1 — Slave Select for SPI1/SSP
[3]
. Selects the SPI
interface as a slave.
I EINT3 — External interrupt 3 input.
P0[21]/PWM5/
RD3/CAP1[3]
4
[2]
C1
[2]
O PWM5 — Pulse Width Modulator output 5.
I RD3 — CAN3 receiver input (LPC2294 only).
I CAP1[3] — Capture input for Timer 1, channel 3.
P0[22]/TD3/
CAP0[0]/
MAT0[0]
5
[2]
D4
[2]
O TD3 — CAN3 transmitter output (LPC2294 only).
I CAP0[0] — Capture input for Timer 0, channel 0.
O MAT0[0] — Match output for Timer 0, channel 0.
P0[23]/RD2 6
[2]
D3
[2]
I RD2 — CAN2 receiver input.
P0[24]/TD2 8
[2]
D1
[2]
O TD2 — CAN2 transmitter output.
P0[25]/RD1 21
[2]
H1
[2]
I RD1 — CAN1 receiver input.
Table 4. Pin description
…continued
Symbol Pin (LQFP) Pin
(TFBGA)
[1]
Type Description

LPC2294HBD144/01,5

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
ARM Microcontrollers - MCU ARM7 256KF/16KR/4CAN
Lifecycle:
New from this manufacturer.
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