Data Sheet AD8615/AD8616/AD8618
Rev. G | Page 11 of 20
APPLICATIONS INFORMATION
INPUT OVERVOLTAGE PROTECTION
If the voltage applied at either input exceeds the supplies, place
external resistors in series with the inputs. The resistor values
can be determined by the equation
mA5
V
SY
S
IN
R
V
The extremely low input bias current allows the use of larger
resistors, which allows the user to apply higher voltages at the
inputs. The use of these resistors adds thermal noise, which
contributes to the overall output voltage noise of the amplifier.
For example, a 10 kΩ resistor has less than 13 nV/√Hz of
thermal noise and less than 10 nV of error voltage at room
temperature.
OUTPUT PHASE REVERSAL
The AD8615/AD8616/AD8618 are immune to phase inversion,
a phenomenon that occurs when the voltage applied at the input of
the amplifier exceeds the maximum input common mode.
Phase reversal can cause permanent damage to the amplifier
and can create lock ups in systems with feedback loops.
VOL
AGE (2V/DIV)
TIME (2ms/DIV)
V
IN
V
OUT
V
S
= ±2.5V
V
IN
= 6V p-p
A
V
= 1
R
L
= 10kΩ
04648-036
Figure 36. No Phase Reversal
DRIVING CAPACITIVE LOADS
Although the AD8615/AD8616/AD8618 are capable of driving
capacitive loads of up to 500 pF without oscillating, a large amount
of overshoot is present when operating at frequencies above
100 kHz. This is especially true when the amplifier is configured
in positive unity gain (worst case). When such large capacitive
loads are required, the use of external compensation is highly
recommended.
This reduces the overshoot and minimizes ringing, which in
turn improves the frequency response of the AD8615/AD8616/
AD8618. One simple technique for compensation is the snubber,
which consists of a simple RC network. With this circuit in place,
output swing is maintained and the amplifier is stable at all gains.
Figure 38 shows the implementation of the snubber, which
reduces overshoot by more than 30% and eliminates ringing
that can cause instability. Using the snubber does not recover
the loss of bandwidth incurred from a heavy capacitive load.
VOLT
GE
100mV/DIV)
TIME (2µs/DIV)
V
S
= ±2.5V
A
V
= 1
C
L
= 500pF
4648-037
Figure 37. Driving Heavy Capacitive Loads Without Compensation
V+
200Ω
500pF
500pF
V–
V
EE
V
CC
200mV
–
+
–
04648-038
Figure 38. Snubber Network
VOLT
GE
100mV/DIV)
TIME (10µs/DIV)
V
S
=±2.5V
A
V
= 1
R
S
= 200Ω
C
S
= 500pF
C
L
= 500pF
04648-039
Figure 39. Driving Heavy Capacitive Loads Using the Snubber Network
