Data Sheet AD8615/AD8616/AD8618
Rev. G | Page 9 of 20
VOL
AGE (2V/DIV)
V
S
= ±2.5V
V
IN
= 2V p-p
A
V
= 10
TIME (200ns/DIV)
04648-024
Figure 24. Settling Time
VOLTAGE (1µV/DIV)
TIME (1s/DIV)
V
S
= 2.7V
04648-025
Figure 25. 0.1 Hz to 10 Hz Input Voltage Noise
0
200
400
600
800
1000
1200
1400
NUMBER
F AMPLIFIERS
–700 –500 –300 –100 100 300 500 700
OFFSET VOLTAGE (µV)
V
S
= 2.7V
T
A
= 25°
C
V
CM
= 0V TO 2.7V
4648-026
Figure 26. Input Offset Voltage Distribution
–400
–500
–300
–200
–100
0
100
200
300
400
500
INPUT OFFSET VOLTAGE (µV)
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
COMMON-MODE VOLTAGE (V)
V
S
= 2.7V
T
A
= 25°C
04648-027
Figure 27. Input Offset Voltage vs. Common-Mode Voltage
(200 Units, Five Wafer Lots Including Process Skews)
–400
–500
–300
–200
–100
0
100
200
300
400
500
INPUT OFFSET VOLTAGE (µV)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
COMMON-MODE VOLTAGE (V)
V
S
= 3.5V
T
A
= 25°C
04648-028
Figure 28. Input Offset Voltage vs. Common-Mode Voltage
(200 Units, Five Wafer Lots Including Process Skews)
SINK
SOURCE
1000
100
10
1
0.1
0.001 0.01 0.1 1 10
I
LOAD
(mA)
V
SY
–
OUT
(mV)
V
S
= ±1.35V
T
A
= 25°C
04648-029
Figure 29. Output Voltage to Supply Rail vs. Load Current