NXP Semiconductors
MF1S50YYX_V1
MIFARE Classic EV1 1K - Mainstream contactless smart card IC for fast and easy solution development
MF1S50yyX_V1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.2 — 23 May 2018
COMPANY PUBLIC 279232 25 / 36
12.5 MIFARE Transfer
The MIFARE Transfer requires a destination block address, and writes the value stored
in the Transfer Buffer into one MIFARE Classic block. The command structure is shown
in Figure 22 and Table 28.
Table 29 shows the required timing.
001aan015
CRCAddrPCD Cmd
PICC ,,ACK''
368 µs
PICC ,,NAK''
NAK
Time out
T
TimeOut
T
NAK
T
ACK
59 µs
ACK
59 µs
Figure 22. MIFARE Transfer
Table 28. MIFARE Transfer command
Name Code Description Length
Cmd B0h Write the value from the Transfer
Buffer into destination block
1 byte
Addr - MIFARE destination block address
(00h to FFh)
1 byte
CRC - CRC according to Ref. 4 2 bytes
NAK see Table 10 see Section 9.3 4-bit
Table 29. MIFARE Transfer timing
T
ACK
min T
ACK
max T
NAK min
T
NAK max
T
TimeOut
Transfer n=9 T
TimeOut
n=9 T
TimeOut
10 ms
13 Limiting values
Stresses above one or more of the limiting values may cause permanent damage to the
device. Exposure to limiting values for extended periods may affect device reliability.
Table 30. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Min Max Unit
I
I
input current - 30 mA
P
tot
/pack total power dissipation per package - 120 mW
NXP Semiconductors
MF1S50YYX_V1
MIFARE Classic EV1 1K - Mainstream contactless smart card IC for fast and easy solution development
MF1S50yyX_V1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.2 — 23 May 2018
COMPANY PUBLIC 279232 26 / 36
Symbol Parameter Min Max Unit
T
stg
storage temperature -55 125 °C
T
amb
ambient temperature -25 70 °C
V
ESD
electrostatic discharge voltage on LA/LB
[1]
2 - kV
[1] ANSI/ESDA/JEDEC JS-001; Human body model: C = 100 pF, R = 1.5 kΩ
CAUTION
This device has limited built-in ElectroStatic Discharge (ESD) protection.
The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the gates.
14 Characteristics
Table 31. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
C
i
input capacitance
[1]
14.9 16.9 19.0 pF
f
i
input frequency - 13.56 - MHz
EEPROM characteristics
t
ret
retention time T
amb
= 22 °C 10 - - year
N
endu(W)
write endurance T
amb
= 22 °C 100000 200000 - cycle
[1] T
amb
=22°C, f=13,56Mhz, V
LaLb
= 1,5 V RMS
15 Wafer specification
For more details on the wafer delivery forms see Ref. 9.
Table 32. Wafer specifications MF1S50yyXDUy
Wafer
diameter 200 mm typical (8 inches)
300 mm typical (12 inches)
maximum diameter after foil expansion 210 mm (8 inches)
not applicable (12 inches)
die seperation process laser dicing (8 inches)
blade dicing (12 inches)
thickness MF1S50yyXDUD 120 μm ± 15 μm
MF1S50yyXDUF 75 μm ± 10 μm
flatness not applicable
Potential Good Dies per Wafer (PGDW) 64727 (8 inches)
147540 (12 inches)
Wafer backside
material Si
NXP Semiconductors
MF1S50YYX_V1
MIFARE Classic EV1 1K - Mainstream contactless smart card IC for fast and easy solution development
MF1S50yyX_V1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.2 — 23 May 2018
COMPANY PUBLIC 279232 27 / 36
treatment ground and stress relieve
R
a
max = 0.5 μmroughness
R
t
max = 5 μm
Chip dimensions
x = 658 μm (8 inches)
x = 660 μm (12 inches)
step size
[1]
y = 713 μm (8 inches)
y = 715 μm (12 inches)
typical = 19 μmgap between chips
[1]
minimum = 5 μm
not applicable (12 inches)
Passivation
type sandwich structure
material PSG / nitride
thickness 500 nm / 600 nm
Au bump (substrate connected to VSS)
material > 99.9 % pure Au
hardness 35 to 80 HV 0.005
shear strength > 70 MPa
height 18 μm
within a die = ±2 μm
within a wafer = ±3 μm
height uniformity
wafer to wafer = ±4 μm
flatness minimum = ±1.5 μm
size LA, LB, VSS, TEST
[2]
= 66 μm × 66 μm
size variation ±5 μm
under bump metallization sputtered TiW
[1] The step size and the gap between chips may vary due to changing foil expansion
[2] Pads VSS and TESTIO are disconnected when wafer is sawn.
15.1 Fail die identification
Electronic wafer mapping covers the electrical test results and additionally the results of
mechanical/visual inspection. No ink dots are applied.
15.2 Package outline
For more details on the contactless modules MOA4 and MOA8 please refer to Ref. 7 and
Ref. 8.

MF1S5031XDUD2/V1A

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
RFID Transponders MIFARE Classic EV1 1K - Mainstream contactless smart card IC for fast and easy solution development
Lifecycle:
New from this manufacturer.
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