PHD110NQ03LT,118

Philips Semiconductors
PHD110NQ03LT
N-channel TrenchMOS™ logic level FET
Product data Rev. 01 — 16 June 2004 4 of 12
9397 750 13468
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
5. Thermal characteristics
5.1 Transient thermal impedance
Table 4: Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-mb)
thermal resistance from junction to mounting base Figure 4 - - 1.3 K/W
R
th(j-a)
thermal resistance from junction to ambient mounted on a printed-circuit
board; minimum footprint
- 75 - K/W
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
03af10
10
-3
10
-2
10
-1
1
10
10
-5
10
-4
10
-3
10
-2
10
-1
1 10
t
p
(s)
Z
th(j-mb)
(K/W)
single pulse
δ = 0.5
0.2
0.1
0.05
0.02
t
p
t
p
T
P
t
T
δ =
Philips Semiconductors
PHD110NQ03LT
N-channel TrenchMOS™ logic level FET
Product data Rev. 01 — 16 June 2004 5 of 12
9397 750 13468
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
6. Characteristics
Table 5: Characteristics
T
j
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
drain-source breakdown voltage I
D
= 250 µA; V
GS
=0V
T
j
=25°C 25--V
T
j
= 55 °C 22--V
V
GS(th)
gate-source threshold voltage I
D
= 1 mA; V
DS
=V
GS
; Figure 9
T
j
=25°C 1 1.5 2 V
T
j
= 150 °C 0.5 - - V
T
j
= 55 °C - - 2.2 V
I
DSS
drain-source leakage current V
DS
=25V; V
GS
=0V
T
j
=25°C - 0.05 1 µA
T
j
= 175 °C - - 500 µA
I
GSS
gate-source leakage current V
GS
= ±15 V; V
DS
= 0 V - 10 100 nA
R
DSon
drain-source on-state resistance V
GS
=5V; I
D
=25A;Figure 7 and 8
T
j
=25°C - 5.3 6.2 m
T
j
= 175 °C - 8.3 11.2 m
V
GS
= 10 V; I
D
=25A;Figure 7 and 8 - 3.9 4.6 m
Dynamic characteristics
Q
g(tot)
total gate charge I
D
=50A;V
DD
=15V;V
GS
=5V;Figure 13 - 26.7 - nC
Q
gs
gate-source charge - 8.5 - nC
Q
gd
gate-drain (Miller) charge - 8.4 - nC
C
iss
input capacitance V
GS
=0V; V
DS
= 25 V; f = 1 MHz;
Figure 11
-2200-pF
C
oss
output capacitance - 725 - pF
C
rss
reverse transfer capacitance - 290 - pF
t
d(on)
turn-on delay time V
DD
=15V; I
D
= 12.5 A; V
GS
=5V;
R
G
= 5.6
-18-ns
t
r
rise time -70-ns
t
d(off)
turn-off delay time - 75 - ns
t
f
fall time -70-ns
Source-drain diode
V
SD
source-drain (diode forward) voltage I
S
= 25 A; V
GS
=0V;Figure 12 - 0.85 1.2 V
t
rr
reverse recovery time I
S
= 10 A; dI
S
/dt = 100 A/µs; V
GS
=0V - 43 - ns
Q
r
recovered charge - 40 - nC
Philips Semiconductors
PHD110NQ03LT
N-channel TrenchMOS™ logic level FET
Product data Rev. 01 — 16 June 2004 6 of 12
9397 750 13468
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
T
j
=25°CT
j
=25°C and 175 °C; V
DS
> I
D
xR
DSon
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
T
j
=25°C
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
03af12
0
20
40
60
80
0 0.2 0.4 0.6 0.8 1
V
DS
(V)
I
D
(A)
3 V
5 V
T
j
= 25
°
C
V
GS
= 2.5 V
10 V
3.5 V
4 V4.5 V
03af14
0
20
40
60
80
01234
V
GS
(V)
I
D
(A)
V
DS
> I
D
x R
DSon
T
j
= 25
°
C175
°
C
03af13
0
4
8
12
16
0 20406080
I
D
(A)
R
DSon
(m)
4.5 V
V
GS
= 3.5 VT
j
= 25
°
C
5 V
10 V
4 V
03af18
0
0.5
1
1.5
2
-60 0 60 120 180
T
j
(
°
C)
a
a
R
DSon
R
DSon 25 C
°
()
-----------------------------
=

PHD110NQ03LT,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
MOSFET N-CH 25V 75A DPAK
Lifecycle:
New from this manufacturer.
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