LTC3802EGN#TRPBF Datasheet LTC3802EUH#PBF, LTC3802EGN#TRPBF, LTC3802EUH#TRPBF | P16-P18

LTC3802

3802f

internal 7µA current source pull-up is connected to the

RUN/SS pin, allowing a soft-start ramp to be generated

with a single external capacitor to ground. The 7µA current

source is active even when the LTC3802 is shut down,

ensuring the device will start when the external pull-down

at RUN/SS is released. Under shutdown conditions, the

LTC3802 goes into a micropower sleep mode, and the

quiescent current drops to 100µA.

The RUN/SS pin shuts down the LTC3802 when it falls

below 0.8V (Figure 2). Between about 0.8V and 2V, the

LTC3802 wakes up and the duty cycle is kept to a miminum.

As the potential at RUN/SS goes higher, the duty cycle

increases linearly between 2V and 3.2V, reaching its final

value of 89% when RUN/SS exceeds 3.2V. Prior to this

point, the feedback amplifier will assume control of the

loop and the output will come into regulation. Note that the

RUN/SS linear range varies with the potential at V

INFF

; for

5V input voltage, the RUN/SS active range reduces to

2V-2.25V.

The value of the soft-start capacitor, C

, may depend on

the input and output voltages, inductor value, output

capacitance and load current. The inductor’s start-up

current (from V

OUT

= 0V), can be much higher than its

steady-state current. The difference depends on the input

power supply slew rate, the input and output voltages, the

LTC3802 soft-start slew rate, and the inductor and output

capacitor values.

For a given application, the known input and output

requirements determine the output inductor and capacitor

values. These values establish the transient load recovery

time. In general, a low value inductor combined with a high

value capacitor yields a short transient load recovery time

at the expense of higher inductor ripple and start-up

current. These components, together with a small soft-

start capacitor, can also cause high inrash current. This

triggers the LTC3802 current limit comparator and forces

the LTC3802 to repeat the soft-start cycle, never allowing

the supply to start.

Start-up problems can also occur when a small soft-start

capacitor is used with a small output inductor and

capacitor. High input voltages generate high inrash cur-

rents, charging the output capacitor quickly and causing

the output to overshoot. The LTC3802 OVP comparator

turns off the top MOSFET once the output is 5% higher

than its nominal value. However, the residual energy in

the inductor will continue to charge the output capacitor,

forcing the output voltage to increase further until the

inductor energy is depleted. This overshoot at the output

causes the feedback loop to operate nonlinearly; the

output tends to ring for several cycles until the loop

mechanism is restored.

Therefore, select C

with start-up in mind. Choosing C

to ensure that there is no output overshoot and the inrush

current is not able to trigger the current comparator. A

minimum recommended soft-start capacitor of

= 0.1µF will be sufficient for most applications.

Undervoltage Lockout

The LTC3802 is designed for wide V

operation. The

internal UVLO circuit monitors the V

and V

INFF

potential

and starts operation as long as they are above their 2.5V

UVLO thresholds. For high V

supply operation, the low

UVLO threshold should not cause any problem under

typical application conditions. Upon power-up, once the

potential is higher than the UVLO threshold, the

LTC3802 releases the RUN/SS node and allows the start-

up current to charge the soft-start capacitor. The time

interval for the RUN/SS potential to ramp from 0.8V to 2V

allows the V

supply to slew to its steady-state potential.

A 0.1µF soft-start capacitor creates a 17ms time delay

before the driver starts switching. Most power supplies

have a start-up time well within this time interval. For some

APPLICATIO S I FOR ATIO

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Figure 2. Soft-Start Operation in Start-Up and Current Limit

START-UP

RUN/SS

3.2V

0.8V

POWER DOWN MODE

NORMAL OPERATION

COMP CONTROLS DUTY CYCLE

RUN/SS CONTROLS DUTY CYCLE

MINIMUM DUTY CYCLE

CURRENT LIMIT

3802 F02

OUT

LTC3802 ENABLE

LTC3802

3802f

special power supplies with a slow start-up slew rate, the

LTC3802 drivers might start switching before the input

supply reaches its steady-state value. The high inrush

current through the input power cable might cause the V

supply to dip below the UVLO threshold and cause start-

up problems. Figure␣ 3 shows a simple circuit to fix this

problem. The selection of the zener voltage allows the V

UVLO trip point to be programmed externally.

The LTC3802 can be configured to give two different

power-up/power-down slew rates to meet different appli-

cation requirements: ratiometric and coincident tracking

configurations (Figure 4). With a ratiometric configura-

tion, the LTC3802 produces two different output slew

rates (with V

OUT1

> V

OUT2

). Because each channel’s slew

rate is proportional to its corresponding output voltage,

the two output voltages reach their steady-state value at

about the same time. The coincident configuration pro-

duces the same slew rate at both outputs, so that the lower

output voltage channel reaches its steady state first.

Figure 4 shows the simplified schematic to realize this

power-up function. During power-up, the tracking ampli-

fier TRACK servos the tracking feedback loop and forces

FBT to be at the same potential as CMPIN2.

For ratiometric start-up, set:

= R51

or remove resistors R

and R

and short FBT to CMPIN1.

At power-up, if the channel 2 output voltage slew rate is

too fast, or CMPIN2 is higher than FBT, the tracking

amplifier will force a smaller channel 2 duty cycle.

Channel␣ 1’s duty cycle is controlled by the RUN/SS pin and

is not affected by the tracking amplifier.

For coincident start-up, set:

= R52

During power-up, if the channel 1 output voltage is higher

than that of channel 2, or if FBT is higher than CMPIN2, the

tracking amplifier TRACK starts to discharge the C

capacitor and forces both channels to have the same duty

cycle and output voltage. The tracking amplifier stops

discharging once channel 2 reaches its negative power

good threshold.

To have the proper power-down sequence, ground the

PHASEMD pin. This turns on an internal current source

which slowly discharges the soft-start capacitor. Once the

RUN/SS potential is low enough to control the duty cycle,

the tracking amplifier takes control and servos the feed-

back loop to produce the selected output ramp. The

LTC3802 tracking function can be easily disabled by

disconnecting the FBT resistive divider and shorting FBT

to CMPIN2.

APPLICATIO S I FOR ATIO

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2N3904

3802 F03

100k

10k

> V

RUN/SS

LTC3802

2N3904

1N4699

= 12V

Figure 3. External UVLO Setting

Start-Up Tracking

Many DSP chips, microprocessors, FPGAs and ASICs

require multiple power supplies for the core and I/O

sections. Internally, the core and I/O blocks are isolated by

structures which may become forward biased if the supply

voltages are not at specified levels. During power-up and

power-down operations, differences in the starting point

and ramp rates of the two supplies may cause current to

flow between the isolation structures which, when pro-

longed and excessive, can reduce the useable life of the

semiconductor device. These currents can also trigger

latch-up in devices, leading to device failure.

Of greater concern than internal isolation of core and I/O

structures are system-level concerns, such as bus

contention between the I/O pins of the DSP and external

peripheral devices. Power supply sequencing between the

core and I/O may be required to prevent bidirectional I/O

pins of the DSP and a peripheral device from opposing

each other. Since the bus control logic originates in the

core section, powering the I/O prior to the core may cause

the DSP and peripheral pins to be configured

simulatneously as outputs. If the data values on each side

are opposing, then the output drivers contend for control,

causing excessive current flow and eventually device

failure.

LTC3802

3802f

The QFN version of the LTC3802 provides an additional

reference pin for external ratiometric start-up. If the poten-

tial at the EXTREF pin is less than 0.6V, it overrides the

internal reference. This pin can be connected to an external

ramp to control the output slew rate. If external tracking is

not required, connect EXTREF to a potential somewhat

larger than 0.6V or short EXTREF to the RUN/SS pin. The

EXTREF pin should never be allowed to float. In the GN28

package, EXTREF is internally shorted to the RUN/SS pin.

Burst Mode Operation

The LTC3802 switcher supply has two modes of opera-

tion. Under heavy loads, it operates as a fully synchro-

nous, continuous conduction switching regulator. In this

mode of operation (continuous mode), the current in the

inductor flows in the positive direction (towards the out-

put) during the entire switching cycle, constantly supply-

ing current to the load. In this mode, the synchronous

switch (QB) is on whenever QT is off, so the current always

flows through a low impedance switch, minimizing volt-

age drop and power loss. This is the most efficient mode

of operation at heavy loads, where the resistive losses in

the power devices are the dominant loss term.

Continuous mode works efficiently when the load current

is greater than half of the ripple current in the inductor. In

a buck converter like the LTC3802, the average current in

the inductor (averaged over one switching cycle) is equal

to the load current. The ripple current is the difference

between the maximum and the minimum current during

a switching cycle (see Figure 5a). The ripple current

depends on inductor value, clock frequency and output

voltage, but is constant regardless of load as long as the

LTC3802 remains in continuous mode. See the Inductor

Selection section for a detailed description of ripple

current.

APPLICATIO S I FOR ATIO

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Figure 4. Simplified Power-Up/Power-Down Output Tracking Schematic

1.7V

SAW1

PHASEMD

TRACK

POWER-UP/-DOWN OUTPUTS

RUN/SS

SAW2

L2L1

EXTREF

OUT1

R11R

CMPIN1

FBT

REF

+–

–

CH2

DUTY CYCLE

CONTROL

LFF

AND

PWM

OUT1

MUST BE HIGHER THAN V

OUT2

R11 = R41 = R

= R12 = R42

= R51, R

= R52

EXTREF

OUT2

REF

CMPIN2

3802 F04

R12

7µA

14µA

R42

R52

R41

R51

–

LFF

AND

PWM

CH1

DUTY CYCLE

CONTROL

–

RATIOMETRIC TRACKING

= R51

= 1µF

OUT1

WITH

10Ω LOAD

OUT2

WITH

10Ω LOAD

0.5V/DIV

10ms/DIV

COINCIDENT TRACKING

= R52

= 1µF

OUT1

WITH

10Ω LOAD

OUT2

WITH

10Ω LOAD

0.5V/DIV

10ms/DIV

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LTC3802EGN#TRPBF

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Description:

Switching Voltage Regulators 2-Phase, Dual, Step Dwn Synch Controller

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LTC3802EGN#TRPBF

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