LTC3802
25
3802f
APPLICATIO S I FOR ATIO
WUUU
or Kool Mµ
®
cores. A variety of inductors designed for high
current, low voltage applications are available from manu-
facturers such as Sumida, Panasonic, Coiltronics, Coil-
craft and Toko.
PC Board Layout Checklist
When laying out the printed circuit board, start with the
power device. Be sure to orient the power circuitry so that
a clean power flow path is achieved. Conductor widths
should be maximized and lengths minimized. After you are
satisfied with the power path, the control circuitry should
be laid out. It is much easier to find routes for the relatively
small traces in the control circuits than it is to find
circuitous routes for high current paths. After the layout,
the following checklist should be used to ensure proper
operation of the LTC3802.
1. Place the top N-channel MOSFETs QT1 and QT2 within
1cm of each other with a common drain connection at
C
IN
. Do not attempt to split the input decoupling for the
two channels because doing so can create a resonant
loop.
2. Place C
IN
, C
OUT
, the MOSFETs, Schottky diode and the
inductor together in one compact area.
3. Split the signal and power grounds. The path formed by
the top and bottom N-channel MOSFETs, Schottky
diode, and the C
IN
capacitor should have short leads
and PC trace lengths. The output capacitor (–) termi-
nals should be connected as close as possible to the (–
) terminals of the input capacitor by placing the capacitors
next to each other. The combined LTC3802 signal
ground pin and the ground return of C
VCC
must return
to the combined C
OUT
(–) terminals. Use a modified
“star ground” technique: a low impedance, large cop-
per area central grounding point on the same side of the
PC board as the input and output capacitors, with tie-ins
for the bottom of the V
CC
decoupling capacitor, the
bottom of the voltage feedback resistive divider and the
SGND pin of the IC.
4. Keep the switching nodes (SW1, SW2), top gate nodes
(TG1, TG2), and boost nodes (BOOST1, BOOST2)
away from sensitive small-signal nodes, especially
from the opposite channel’s voltage and current sens-
ing feed
back pins. All of these nodes have very large
and fast moving signals and therefore should be kept on
the “output side” of the LTC3802 and occupy minimum
PC trace area.
5. Reduce the parasitic inductance at the SW and PGND
connections to allow proper Burst Mode operation. Use
multiple vias if possible.
6. Use the same resistor values for the FB and CMPIN
resistive divider. Connect these dividers to the same
node: the (+) terminals of C
OUT
and signal ground. The
dividers should be connected to a node away from any
high current path.
7. Place the V
CC
and PV
CC
decoupling capacitor close to
the IC, between the V
CC
and the signal ground, and
between PV
CC
and PGND. The V
CC
capacitor provides a
quiet supply for the sensitive analog circuits and the
PV
CC
capacitor carries the MOSFET drivers current
peaks. An additional 1µF ceramic capacitor placed
immediately next to the V
CC
and SGND pins can sub-
stantially improve noise performance.
Checking Transient Response
For all new LTC3802 PCB circuits, transient tests need to
be performed to verify the proper feedback loop operation.
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, V
OUT
shifts by an
amount equal to I
LOAD
• (ESR), where ESR is the effective
series resistance of C
OUT
. I
LOAD
also begins to charge or
discharge C
OUT
generating the feedback error signal that
forces the regulator to adapt to the current change and
return V
OUT
to its steady-state value. During this recovery
time, V
OUT
can be monitored for excessive overshoot or
ringing which would indicate a stability problem.
Measuring transient response presents a challenge in two
respects: obtaining an accurate measurement and gener-
ating a suitable transient for testing the circuit. Output
measurements should be taken with a scope probe di-
rectly across the output capacitor. Proper high frequency
probing techniques should be used. Do not use the 6"
ground lead that comes with the probe! Use an adapter
that fits on the tip of the probe and has a short ground clip
Kool Mµ is a registered trademark of Magnetics, Inc.
LTC3802
26
3802f
to ensure that inductance in the ground path doesn’t
cause a bigger spike than the transient signal being
measured. The typical probe tip ground clip is spaced just
right to span the leads of a typical output capacitor. In
general, it is best to take this measurement with the
20MHz bandwidth limit on the oscilloscope turned on to
limit high frequency noise. Note that microprocessor
manufacturers typically specify ripple 20MHz, as en-
ergy above 20MHz is generally radiated and not con-
ducted and will not affect the load even if it appears at the
output capacitor.
Now that we know how to measure the signal, we need to
have something to measure. The ideal situation is to use
the actual load for the test, switching it on and off while
watching the output. If this isn’t convenient, a current step
generator is needed. This generator needs to be able to
turn on and off in nanoseconds to simulate a typical
switching logic load, so stray inductance and long clip
leads between the LTC3802 and the transient generator
must be minimized.
Figure 9 shows an example of a simple transient genera-
tor. Be sure to use a noninductive resistor as the load
element—many power resistors use an inductive spiral
pattern and are not suitable for use here. A simple solution
is to take ten 1/4W film resistors and wire them in parallel
to get the desired value. This gives a noninductive resistive
load which can dissipate 2.5W continuously or 250W if
pulsed with a 1% duty cycle, enough for most LTC3802
circuits. Solder the MOSFET and the resistor(s) as close to
the output of the LTC3802 circuit as possible and set up
the signal generator to pulse at a 100Hz rate with a 1% duty
cycle. This pulses the LTC3802 with 100µs transients
10ms apart, adequate for viewing the entire transient
recovery time for both positive and negative transitions
while keeping the load resistor cool.
GN Package
28-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.386 – .393*
(9.804 – 9.982)
GN28 (SSOP) 0502
12
3
4
5
6
7
8 9 10 11 12
.229 – .244
(5.817 – 6.198)
.150 – .157**
(3.810 – 3.988)
202122232425262728
19
18
17
13 14
16
15
.016 – .050
(0.406 – 1.270)
.015
± .004
(0.38 ± 0.10)
× 45°
0° – 8° TYP
.0075 – .0098
(0.191 – 0.249)
.053 – .069
(1.351 – 1.748)
.008 – .012
(0.203 – 0.305)
.004 – .009
(0.102 – 0.249)
.0250
(0.635)
BSC
.033
(0.838)
REF
.254 MIN
RECOMMENDED SOLDER PAD LAYOUT
.150 – .165
.0250 TYP.0165 ±.0015
.045 ±.005
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
INCHES
(MILLIMETERS)
NOTE:
1. CONTROLLING DIMENSION: INCHES
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
U
PACKAGE DESCRIPTIO
Figure 9. Transient Load Generator
PULSE
GENERATOR
0V TO 10V
100Hz, 1%
DUTY CYCLE
LTC3802
LOCATE CLOSE TO THE OUTPUT
V
OUT
10k
50
IRFZ44 OR
EQUIVALENT
R
LOAD
3802 F09
APPLICATIO S I FOR ATIO
WUUU
LTC3802
27
3802f
U
PACKAGE DESCRIPTIO
UH Package
32-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1693)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
5.00 ± 0.10
(4 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE
M0-220 VARIATION WHHD-(X) (TO BE APPROVED)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
0.23 TYP
(4 SIDES)
31
1
2
32
BOTTOM VIEW—EXPOSED PAD
3.45 ± 0.10
(4-SIDES)
0.75 ± 0.05
R = 0.115
TYP
0.25 ± 0.05
(UH) QFN 0603
0.50 BSC
0.200 REF
0.00 – 0.05
0.70 ±0.05
3.45 ±0.05
(4 SIDES)
4.10 ±0.05
5.50 ±0.05
0.25 ± 0.05
PACKAGE OUTLINE
0.50 BSC
RECOMMENDED SOLDER PAD LAYOUT

LTC3802EUH#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2-Phase, Dual, Step Dwn Synch Controller
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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