PCA2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 25 November 2011 10 of 30
NXP Semiconductors
PCA2002
32 kHz watch circuit with programmable output period and pulse width
8.8 Checking the memory content
The stored data of the OTP array can be checked bit wise by measuring the supply
current (see Figure 6
). The array word is selected by the instruction state and the bit is
addressed by the shift register.
To read a word, the word is first selected (t
d
=t
1
) and a logic 1 is written into the first cell of
the shift register (t
d
=t
3
). This logic 1 is then shifted through the entire shift register
(t
d
=t
2
), so that it points with each clock pulse to the next bit.
If the addressed OTP cell contains a logic 1, a 30 k resistor is connected between V
DD
and V
SS
; this increases the supply current accordingly.
Figure 6
shows the supply voltage modulation for reading word B, with the corresponding
supply current variation for word B = 110101 (sequence: first MSB and last LSB).
V
DD(nom)
: nominal supply voltage.
(1)
Fig 6. Supply voltage modulation for reading word B
V
DD(nom)
V
DD
V
P(mod)
(1)
V
SS
t
0
mgw357
I
DD
t
1
t
1
t
3
t
2
t
1
t
2
t
2
t
2
t
2
V
P(prog)(start)
t
p(start)
V
P(prog)(stop)
t
p(stop)
I
DD
V
DD
30 k
---------------
=
